Patents by Inventor Chia-Yu Jin

Chia-Yu Jin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250015483
    Abstract: A semiconductor package includes a first package having a first side and a second side opposing the first side. The first package comprises a first electronic component and a second electronic component arranged in a side-by-side manner on the second side. A second package is mounted on the first side of the first package. The second package comprises a radiative antenna element. A connector is configured to electrically couple to a 5G modem through a flex cable and is disposed on the second side.
    Type: Application
    Filed: September 16, 2024
    Publication date: January 9, 2025
    Applicant: MEDIATEK INC.
    Inventors: Wen-Chou Wu, Yi-Chieh Lin, Chia-Yu Jin, Hsing-Chih Liu
  • Publication number: 20240371781
    Abstract: An electronic device used in the Universal Chiplet Interconnect Express (UCIe) standard is provided. The electronic device includes a substrate and first and second semiconductor devices. The first and second semiconductor devices are disposed on a top surface of the substrate. The substrate includes an interconnect structure electrically connected between the first and second semiconductor devices. The interconnect structure includes a first pad, a first signal trace and first and second via structures. The first pad is located on the top surface of the substrate. The first signal trace is covered by the first and second semiconductor devices. The first via structure is electrically connected between the first pad and the first signal trace. The second via structure is electrically connected between the first via structure and the first signal trace. The first via structure is misaligned with the second via structure.
    Type: Application
    Filed: May 3, 2024
    Publication date: November 7, 2024
    Inventors: Shu-Yuan TSENG, Sheng-Yuan FU, Duen-Yi HO, Chia-Yu JIN
  • Patent number: 12095142
    Abstract: A semiconductor package includes a first package having a first side and a second side opposing the first side. The first package comprises a first electronic component and a second electronic component arranged in a side-by-side manner on the second side. A second package is mounted on the first side of the first package. The second package comprises a radiative antenna element. A connector is disposed on the second side.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: September 17, 2024
    Assignee: MEDIATEK INC.
    Inventors: Wen-Chou Wu, Yi-Chieh Lin, Chia-Yu Jin, Hsing-Chih Liu
  • Publication number: 20230039444
    Abstract: A semiconductor package includes a first package having a first side and a second side opposing the first side. The first package comprises a first electronic component and a second electronic component arranged in a side-by-side manner on the second side. A second package is mounted on the first side of the first package. The second package comprises a radiative antenna element. A connector is disposed on the second side.
    Type: Application
    Filed: October 14, 2022
    Publication date: February 9, 2023
    Applicant: MEDIATEK INC.
    Inventors: Wen-Chou Wu, Yi-Chieh Lin, Chia-Yu Jin, Hsing-Chih Liu
  • Patent number: 11509038
    Abstract: A semiconductor package includes a bottom chip package having a first side and a second side opposing the first side. The bottom chip package comprises a first semiconductor chip and a second semiconductor chip arranged in a side-by-side manner on the second side. A top antenna package is mounted on the first side of the bottom chip package. The top antenna package comprises a radiative antenna element. A connector is disposed on the second side.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: November 22, 2022
    Assignee: MEDIATEK INC.
    Inventors: Wen-Chou Wu, Yi-Chieh Lin, Chia-Yu Jin, Hsing-Chih Liu
  • Publication number: 20200303806
    Abstract: A semiconductor package includes a bottom chip package having a first side and a second side opposing the first side. The bottom chip package comprises a first semiconductor chip and a second semiconductor chip arranged in a side-by-side manner on the second side. A top antenna package is mounted on the first side of the bottom chip package. The top antenna package comprises a radiative antenna element. A connector is disposed on the second side.
    Type: Application
    Filed: May 6, 2020
    Publication date: September 24, 2020
    Inventors: Wen-Chou Wu, Yi-Chieh Lin, Chia-Yu Jin, Hsing-Chih Liu
  • Patent number: 10515887
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first carrier substrate having a first surface and an opposing second surface. A second carrier substrate is stacked on the first carrier substrate and has a first surface and an opposing second surface that faces the first surface of the first carrier substrate. A semiconductor die is mounted on the first surface of the second carrier substrate. A heat spreader is disposed on the first surface of the first carrier substrate to cover and surround the second carrier substrate and the semiconductor die. A method for forming the semiconductor package structure is also provided.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: December 24, 2019
    Assignee: MediaTek Inc.
    Inventors: Shih-Yi Syu, Chia-Yu Jin, Che-Ya Chou, Wen-Sung Hsu, Nan-Cheng Chen
  • Publication number: 20180082936
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first carrier substrate having a first surface and an opposing second surface. A second carrier substrate is stacked on the first carrier substrate and has a first surface and an opposing second surface that faces the first surface of the first carrier substrate. A semiconductor die is mounted on the first surface of the second carrier substrate. A heat spreader is disposed on the first surface of the first carrier substrate to cover and surround the second carrier substrate and the semiconductor die. A method for forming the semiconductor package structure is also provided.
    Type: Application
    Filed: September 11, 2017
    Publication date: March 22, 2018
    Inventors: Shih-Yi SYU, Chia-Yu JIN, Che-Ya CHOU, Wen-Sung HSU, Nan-Cheng CHEN
  • Patent number: 8404501
    Abstract: A semiconductor package structure includes a package substrate, at least a chip, solder balls, a light emitting/receiving device, a optical intermediary device and an optical transmission device. The package substrate has a first surface, a second surface, a circuit and solder ball pads, wherein each solder ball pad is electrically connected to the circuit. The chip is disposed on the first surface and electrically connected to the circuit. The solder balls are respectively disposed on the solder ball pads. The light emitting/receiving device is disposed on the package substrate and electrically connected to the circuit. The optical intermediary device is disposed above the light emitting/receiving device. The optical transmission device is inserted in the optical intermediary device, wherein a light emitting by the light emitting/receiving device is emitted to the optical transmission device via the optical intermediary device so that an optical signal is transmitted through the optical transmission device.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: March 26, 2013
    Assignee: Faraday Technology Corp.
    Inventors: Po-Yao Huang, Chia-Yu Jin, Yeong-Jar Chang
  • Publication number: 20120138961
    Abstract: A semiconductor package structure includes a package substrate, at least a chip, solder balls, a light emitting/receiving device, a optical intermediary device and an optical transmission device. The package substrate has a first surface, a second surface, a circuit and solder ball pads, wherein each solder ball pad is electrically connected to the circuit. The chip is disposed on the first surface and electrically connected to the circuit. The solder balls are respectively disposed on the solder ball pads. The light emitting/receiving device is disposed on the package substrate and electrically connected to the circuit. The optical intermediary device is disposed above the light emitting/receiving device. The optical transmission device is inserted in the optical intermediary device, wherein a light emitting by the light emitting/receiving device is emitted to the optical transmission device via the optical intermediary device so that an optical signal is transmitted through the optical transmission device.
    Type: Application
    Filed: December 7, 2010
    Publication date: June 7, 2012
    Applicant: FARADAY TECHNOLOGY CORP.
    Inventors: Po-Yao Huang, Chia-Yu Jin, Yeong-Jar Chang