Patents by Inventor Chia-Yuan Hsu

Chia-Yuan Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12009313
    Abstract: A selective EMI shielding structure for a semiconductor package and a method of fabrication thereof is disclosed. The semiconductor package, comprising: a substrate having a first face; at least one first electronic component mounted adjacent to a first region of the first face; a least one second electronic component mounted adjacent to a second region of the first face; and an encapsulant disposed over the first and the second electronic components, wherein the encapsulant covers directly over the first electronic component, and wherein the encapsulant covers the second electronic component through a layer of conductive material.
    Type: Grant
    Filed: October 1, 2021
    Date of Patent: June 11, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Meng-Jen Wang, Chien-Yuan Tseng, Hung Chen Kuo, Ying-Hao Wei, Chia-Feng Hsu, Yuan-Long Chiao
  • Publication number: 20240170381
    Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Inventors: Chun-Hsien HUANG, Peng-Fu HSU, Yu-Syuan CAI, Min-Hsiu HUNG, Chen-Yuan KAO, Ken-Yu CHANG, Chun-I TSAI, Chia-Han LAI, Chih-Wei CHANG, Ming-Hsing TSAI
  • Patent number: 11991840
    Abstract: This disclosure is directed to an electronic device having a casing, a circular frame, and a display. A panel is arranged on one side of the casing, a circular opening is defined on the panel, and a first fixing structure is arranged on an inner edge of the circular opening. The circular frame is rotatably arranged in the circular opening to close the circular opening, a second fixing structure is arranged on an outer edge of the circular frame, and the second fixing structure is limited by the first fixing structure. The display is embedded in the circular frame and exposed on the panel, so that the display is rotatable according to various placing positions of the casing.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: May 21, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chia-Yuan Lin, Chih-Yuan Hsu, Chung-Chieh Cheng
  • Publication number: 20240162833
    Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Inventors: Yi-Sheng CHANG, Cheng-Chan HSU, Chia-Wei CHU, Chun-Yu YANG, Deng-Cyun HUANG, Yi-Hsun CHIU, Chien-An LAI, Yu-Tai WANG, Chi-Shou HO, Zhi-Yuan WU, Ko-Wen LU
  • Patent number: 11967570
    Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: April 23, 2024
    Assignee: MediaTek Inc.
    Inventors: Chia-Hao Hsu, Tai-Yu Chen, Shiann-Tsong Tsai, Hsing-Chih Liu, Yao-Pang Hsu, Chi-Yuan Chen, Chung-Fa Lee
  • Publication number: 20240114385
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. In certain configurations, the UE establishes a connection supporting an extended reality (XR) application service with a base station. The UE reports, to the base station under a trigger condition, a buffer status report (BSR) to indicate a buffer size for data to be transmitted to the base station. The BSR includes information related to a corresponding BSR table. The UE receives a configuration instruction from the base station. The UE configures resources on the UE.
    Type: Application
    Filed: September 12, 2023
    Publication date: April 4, 2024
    Inventors: Ming-Yuan Cheng, Pradeep Jose, Chia-Chun Hsu
  • Publication number: 20240114359
    Abstract: Apparatus and methods are provided for AI-ML model storage and transfer in the wireless network. In one novel aspect, the AI-ML model is stored at the AI server and transferred through the user plane (UP). In one embodiment, UE downloads the AI-ML model from the AI server through the UP connection. In one embodiment, the AI-ML model is updated at the RAN node, and the UE downloads the AI-ML model through the AI server. In another embodiment, the AI-ML model is updated at the UE, and the UE uploads the AI-ML model to the AI server through the UP connection. In another embodiment, the UE uploads the AI-ML model to the RAN through the AI server. In one embodiment, the UE mobility triggers the AI-ML model transfer. In one novel aspect, the AI dataset is shared and transferred among different entities through the UP connection or a new AI plane.
    Type: Application
    Filed: September 14, 2023
    Publication date: April 4, 2024
    Inventors: Ta-Yuan Liu, Hao Bi, CHIA-CHUN HSU
  • Publication number: 20240114380
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. In certain configurations, the UE establishes a connection supporting an extended reality (XR) application service with a base station. The UE reports, to the base station, a delay status report (DSR) to indicate a buffer size for data to be transmitted to the base station. The DSR includes timing information. The UE receives a configuration instruction from the base station. The UE configures resources on the UE according to the configuration instruction to transmit the data to the base station.
    Type: Application
    Filed: September 13, 2023
    Publication date: April 4, 2024
    Inventors: Ming-Yuan Cheng, Pradeep Jose, Chia-Chun Hsu, Sheng-Yi Ho
  • Publication number: 20240086612
    Abstract: An IC device includes first through third rows of fin field-effect transistors (FinFETs), wherein the second row is between and adjacent to each of the first and third rows, the FinFETs of the first row are one of an n-type or p-type, the FinFETs of the second and third rows are the other of the n-type or p-type, the FinFETs of the first and third rows include a first total number of fins, and the FinFETs of the second row include a second total number of fins one greater or fewer than the first total number of fins.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Po-Hsiang HUANG, Fong-Yuan CHANG, Clement Hsingjen WANN, Chih-Hsin KO, Sheng-Hsiung CHEN, Li-Chun TIEN, Chia-Ming HSU
  • Patent number: 11929314
    Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, Peng-Fu Hsu, Yu-Syuan Cai, Min-Hsiu Hung, Chen-Yuan Kao, Ken-Yu Chang, Chun-I Tsai, Chia-Han Lai, Chih-Wei Chang, Ming-Hsing Tsai
  • Patent number: 10003579
    Abstract: After a friendship pairing process is executed according to a phone directory, send a friendship request message, create at least one first platform identity by the first user, and the first user uses a first platform identity of the at least one first platform identity to make friends with the second user having a platform identity. The first user does not have any platform identity before the first user creates the at least one first platform identity.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: June 19, 2018
    Assignee: Gemtek Technology Co., Ltd.
    Inventors: Der-Hwa Tan, Hsi-Chuan Wei, Chia-Yuan Hsu
  • Publication number: 20180139185
    Abstract: After a friendship pairing process is executed according to a phone directory, send a friendship request message, create at least one first platform identity by the first user, and the first user uses a first platform identity of the at least one first platform identity to make friends with the second user having a platform identity. The first user does not have any platform identity before the first user creates the at least one first platform identity.
    Type: Application
    Filed: February 15, 2017
    Publication date: May 17, 2018
    Inventors: Der-Hwa Tan, Hsi-Chuan Wei, Chia-Yuan Hsu
  • Publication number: 20120320548
    Abstract: The present invention discloses a fixing mechanism for fixing a board card on a circuit board. The fixing mechanism includes a standoff for supporting the board card on the circuit board. A first end of the standoff is fixed inside a hole on the circuit board. A stepping opening is formed on a second end of the standoff, and the second end of the standoff contacts against the board card. The fixing mechanism further includes a blind rivet, a first end of the blind rivet engages inside the stepping opening, and a second end of the blind rivet fastens on the board card so as to fix the board card on the circuit board.
    Type: Application
    Filed: April 20, 2012
    Publication date: December 20, 2012
    Inventors: Huang-Ping Lu, Chia-Yuan Hsu
  • Publication number: 20030184234
    Abstract: An electrode device for a plasma processing system is presented. The electrode device is installed in a chamber of the plasma processing system. The electrode device comprises a plurality of electrode assemblies. Each electrode assembly has at least one first electrode and at least one second electrode. The first electrode is connected to a first output of a power supply, and the second electrode, connected to a second output of the power supply. Each electrode assembly is spaced apart from each other so as to generate plasma in the chamber. The electrode assembly comprises at least two electrodes (the first electrode and the second electrode) with shorter distance between the electrodes, and the type of the power supply can be altered to increase the electric field intensity, the hollow cathode effect, plasma density and uniformity. The electrode device can raise the efficiency in processing the object, and increase the uniformity of the electric field and upgrade the quality of the object.
    Type: Application
    Filed: November 13, 2002
    Publication date: October 2, 2003
    Applicants: Nano Electronics and Micro System Technologies, Inc., S&S Laminates Corporation
    Inventors: Chia-Yuan Hsu, Yong-Hau Foo, Jin-Fong Yen, Yeou-Yih Tsai, Chong-Ren Maa
  • Patent number: 6603091
    Abstract: A cleaning device with deeply reaching plasma and assisting electrodes has supporting racks, a chamber, a plasma sources, metallic grids. Flat boards to be cleaned such as circuit boards are located in the supporting racks. The supporting racks are disposed in the chamber. The metallic grids are disposed on two sides of the chamber. The plasma source is disposed next to the metallic grids. Electric voltage is applied to the metallic grids such that plasma from the plasma source can be pushed deeply into the supporting racks to evenly and sufficiently clean the circuit boards.
    Type: Grant
    Filed: April 4, 2002
    Date of Patent: August 5, 2003
    Assignee: Nano Electronics and Micro System Technologies, Inc.
    Inventors: Chia-Yuan Hsu, Yong-Hau Foo, Paul Hong
  • Patent number: 6476341
    Abstract: A cleaning device with deeply reaching plasma and assisting electrodes has supporting racks, a chamber, a plasma sources, metallic grids. Flat boards to be cleaned such as circuit boards are located in the supporting racks. The supporting racks are disposed in the chamber. The metallic grids are disposed on two sides of the chamber. The plasma source is disposed next to the metallic grids. Electric voltage is applied to the metallic grids such that plasma from the plasma source can be pushed deeply into the supporting racks to evenly and sufficiently clean the circuit boards.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: November 5, 2002
    Assignee: Advanced Plasma and Thin Films Technologies, Inc.
    Inventors: Chia-Yuan Hsu, Yong-Hau Foo, Paul Hong
  • Publication number: 20020117480
    Abstract: A cleaning device with deeply reaching plasma and assisting electrodes has supporting racks, a chamber, a plasma sources, metallic grids. Flat boards to be cleaned such as circuit boards are located in the supporting racks. The supporting racks are disposed in the chamber. The metallic grids are disposed on two sides of the chamber. The plasma source is disposed next to the metallic grids. Electric voltage is applied to the metallic grids such that plasma from the plasma source can be pushed deeply into the supporting racks to evenly and sufficiently clean the circuit boards.
    Type: Application
    Filed: April 4, 2002
    Publication date: August 29, 2002
    Inventors: Chia-Yuan Hsu, Yong-Hau Foo, Paul Hong
  • Patent number: D1016283
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: February 27, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Barry Lam, Chia-Yuan Chang, Jung-Wen Chang, Kao-Yu Hsu
  • Patent number: D1022213
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: April 9, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Barry Lam, Chia-Yuan Chang, Jung-Wen Chang, Kao-Yu Hsu
  • Patent number: D1031981
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: June 18, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Barry Lam, Chia-Yuan Chang, Jung-Wen Chang, Kao-Yu Hsu