Abstract: A memory cell device, having a memory material switchable between electrical property states by the application of energy, comprises an electrode, a separation layer against an electrode surface, a hole in the separation layer, a second material in the hole defining a void having a downwardly and inwardly tapering void region. A memory material is in the void region in electrical contact with the electrode surface. A second electrode is in electrical contact with the memory material. Energy passing between the first and second electrodes is concentrated within the memory material so to facilitate changing an electrical property state of the memory material. The memory material may comprise a phase change material. The second material may comprise a high density plasma-deposited material. A method for making a memory cell device is also disclosed.

Abstract: An MRAM cell comprises a magnetic metal layer and a magnetic sensing device in close proximity to the magnetic metal layer. One end of the magnetic metal layer is coupled with a word line transistor and a diode is included and configured to couple the magnetic sensing device to a bit line. The magnetic metal layer can be used to both program and read the cell, eliminating the need for a second current lien in the cell.

Abstract: An MRAM cell comprises a magnetic metal layer and a magnetic sensing device in close proximity to the magnetic metal layer. One end of the magnetic metal layer is coupled with a word line transistor, while the other end of the magnetic metal layer is coupled to a first bit line. The magnetic sensing device can be coupled with a second bit line. The magnetic metal layer can be used to both program and read the cell, eliminating the need for a second current lien in the cell.

Abstract: A nonvolatile memory device is disclosed. The device includes a substrate, at least one relatively high permeability conductive line, and at least one magnetoresistive memory cell separated from the at least one relatively high permeability conductive line by an insulating material and located in a region of a magnetic field induced in the relatively high permeability conductive line. Methods of making such devices are also disclosed.

Abstract: An MRAM cell comprises a magnetic metal layer and a magnetic sensing device in close proximity to the magnetic metal layer. One end of the magnetic metal layer is coupled with a word line transistor and a diode is included and configured to couple the magnetic sensing device to a bit line via a second word line transistor. The magnetic metal layer can be used to both program and read the cell, eliminating the need for a second current lien in the cell.

Abstract: A method of manufacturing a non-volatile semiconductor memory device includes forming a sub-gate without an additional mask. A low word-line resistance is formed by a metal silicide layer on a main gate of the memory device. In operation, application of a voltage to the sub-gate forms a transient state inversion layer that serves as a bit-line, so that no implantation is required to form the bit-line.

Abstract: Methods for forming non-volatile memory cells include: (a) providing a semiconductor substrate having at least two source/drain regions, and a dielectric material disposed on the substrate above at least one of the at least two source/drain regions wherein the dielectric material has an exposed surface, and wherein the at least two source/drain regions are separated by a recess trench having an exposed surface, wherein the trench extends downward into the substrate to a depth position below the at least two source/drain regions; (b) forming a charge-trapping layer on the exposed surfaces of the dielectric material and the recess trench; and (c) forming a gate above the charge-trapping layer.

Abstract: A method of manufacturing for providing a narrow line, such as a phase change bridge, on a substrate having a top surface, includes first forming a layer of first material on the substrate. Then, a layer of a pattern material is applied on the layer of first material, and a pattern is defined. The pattern includes a ledge having a sidewall extending substantially to the layer of first material. A sidewall etch mask is formed on the ledge, and used to define a line of the first material on the substrate having a width substantially determined by the width of the sidewall etch mask.

Abstract: A method for altering and reading the contents of a memory cell includes the steps of: applying programming voltages to a first control gate and to a second control gate to cause carriers to be injected and trapped in either a first charge trapping region or in a second charge trapping region; applying erasing voltages to the first control gate and to the second control gate to cause the trapped carriers to be removed from the first charge trapping region and/or the second charge trapping region; and applying a sequence of reading voltages to the first control gate and to the second control gate for determining a state of each of the first and the second charge trapping regions.

Abstract: An one-time programmable read only memory is provided. An N-type doping region and a first P-type doping layer are disposed in a P-type semiconductor substrate sequentially. A second P-type doping layer is disposed between the first P-type doping layer and the N-type doping region. The second P-type doping layer with higher doping level, which has a linear structure, is served as a bit line. An electrically conductive layer is disposed over the P-type semiconductor substrate. The electrically conductive layer also has a linear structure that crosses over the first P-type doping layer. The first N-type doping layer is disposed in the P-type semiconductor substrate between the electrically conductive layer and the first P-type doping layer. The arrangement of N-type and P-type doping layer is used to be selective diode device. An anti-fuse layer is disposed between the electrically conductive layer and the first N-type doping layer.

Abstract: The present invention provides a high-selectivity etching process for fabricating openings for a contact structure or a dual damascene structure in combination with a Si-rich silicon oxynitride (SiON) barrier layer. The process of this invention is suitable for forming at least an opening for a dual damascene opening or a contact opening, and can be applied in a dual damascene structure, a contact plug, a borderless contact structure or a self aligned contact (SAC) structure.

Abstract: Roughly described, a magnetic structure includes an electrically conductive path for carrying current flow, a soft magnetic material with high permeability value in magnetic communication with the current flow so that it can be magnetized in either of two directions, and a magnetic device such as a magnetic random access memory cell, having an active layer that is quantum mechanically or magnetostatically coupled to the soft magnetic material. The soft magnetic material acts as an intermediary between the magnetic induction of the current flow and the magnetization of the active layer of the magnetic device to reduce the writing current.

Abstract: Roughly described, a magnetic structure includes an electrically conductive path for carrying current flow, a soft magnetic material with high permeability value in magnetic communication with the current flow so that it can be magnetized in either of two directions, and a magnetic device such as a magnetic random access memory cell, having an active layer that is quantum mechanically or magnetostatically coupled to the soft magnetic material. The soft magnetic material acts as an intermediary between the magnetic induction of the current flow and the magnetization of the active layer of the magnetic device to reduce the writing current.

Abstract: An MRAM array having enhanced magnetoresistance includes a spin filtering element connected by a spin hold element to the MRAM cell structures. A spin filtering element may serve several MRAM cell structures, by connecting the spin filtering element to a series of MRAM cell structures by a spin hold wire, or a spin filtering element and a spin hold element may be formed as adjacent layers in each MRAM cell stack.

Abstract: An invention is provided for a low write current MRAM. Each MRAM cell includes a word line and a bit line. A magnetic device is disposed at the intersection of the word line and the bit line. Disposed at either end of the magnetic device is a writing magnet. The pair of writing magnets switches a magnetic alignment of the magnetic device during a write operation. In aspect, the pair of writing magnets and the magnetic device can be aligned along a long axis of the memory cell, which generally is not aligned with either the word line or the bit line.

Abstract: An invention is provided for a magnetic random access memory (MRAM) cell. The MRAM cell includes a first wordline and a first bitline perpendicular to the wordline. Disposed at an intersection of the first wordline and the first bitline is an MTJ device having a perpendicular magnetic orientation. To program the MRAM cell, current is driven through the two bitlines and two wordlines that are adjacent to the memory cell. As a result, the MRAM cell has a high magnetic transition and low programming current.

Abstract: Roughly described, a magnetic structure includes an electrically conductive path for carrying current flow, a soft magnetic material with high permeability value in magnetic communication with the current flow so that it can be magnetized in either of two directions, and a magnetic device such as a magnetic random access memory cell, having an active layer that is quantum mechanically or magnetostatically coupled to the soft magnetic material. The soft magnetic material acts as an intermediary between the magnetic induction of the current flow and the magnetization of the active layer of the magnetic device to reduce the writing current.