Abstract: A method of operating an image sensor. Charge accumulated in a photodiode during a first sub-exposure may be selectively stored in a storage node responsive to a first control signal. Charge accumulated in the photodiode during a first reset period may be selectively discarded responsive to a second control signal. Charge accumulated in the photodiode during a second sub-exposure may be selectively stored responsive to the first control signal. Charge stored in the storage node from the first and second sub-exposures may be transferred to a floating diffusion node responsive to a third control signal.

Abstract: Electronic devices may be provided with magnetic sensors for detecting the Earth's magnetic field. The magnetic sensors may include thin magnetic sensors located in magnetically quiet regions of the device. The magnetic sensors may be attached to a device housing or a component such as a battery or a cover structure for a battery. The device may include unidirectional magnetic sensors aligned in three orthogonal directions or sensors with two or three magnetic sensor elements aligned in orthogonal directions. Magnetic field data from the three orthogonally aligned sensors or sensor elements may be combined to form directional compass data for the device. Each magnetic sensor may include one or more magnetic sensor elements for detecting the magnetic field and one or more shielded reference sensor elements for detecting environmental changes that can affect the magnetic sensor element. Reference sensor elements may be shared elements for multiple magnetic sensors elements.

Abstract: An electronic device may be provided with an image sensor for capturing digital images. The image sensor may be used as part of image-sensor-based ambient light sensing circuitry for producing ambient light sensor readings. The image-sensor-based ambient light sensing circuitry may include a reference array. The reference array may be formed from an array of light sensor elements that are matched to elements in the image sensor but that are covered with a light blocking material. Control circuitry can measure current flow into the reference array and the image sensor array and can use current measurements from these arrays in producing a calibrated ambient light sensor reading. The control circuitry may make current measurements by measuring a decay time associated with the voltage of a discharging capacitor. A comparator, pulse generator, and switch may be used in periodically recharging the capacitor. The capacitor may be adjusted to ensure accurate readings.

Abstract: Successive approximation register (SAR) and ramp analog to digital conversion (ADC) methods, systems, and apparatus are disclosed. An analog voltage signal may be converted into a multiple bit digital value by generating bits of the multiple bit digital value by performing a SAR conversion on the analog voltage signal, where the bits corresponding to a SAR voltage level, and generating other bits of the multiple bit digital value by performing one or more ramp conversions on the analog voltage signal, the ramp conversion comparing the analog voltage signal to a ramp of voltage levels based on the SAR voltage level. The SAR and ramp ADC can provide multi-sampling using one SAR conversion and multiple ramp conversions. The SAR can set the voltage level of a first ramp of a multiple ramp conversion, which can then be used to preset the voltage level prior to subsequent ramps.

Abstract: A mechanism for discharging parasitic capacitance at an input of an operational amplifier, which is shared between two stages of a pipelined analog-to-digital converter and/or two channels of signal processing circuitry, before the amplifier configuration of the stages/channels is switched. The discharging act occurs when a short reset pulse is generated between two clock phases. The short reset pulse is applied to a switch connected to the operational amplifier input. When the reset pulse closes the switch, a discharge path is created and any parasitic capacitance at the operational amplifier input is discharged through the path. The discharging of the parasitic capacitance substantially mitigates the memory effect and the problems associated with the memory effect.

Abstract: Apparatus, methods, and systems for providing a uniform bias voltage in a biasing circuit to a plurality of pixels. The biasing circuit has a plurality of switches, including a first switch connected at a first end of a capacitor and a second end connected to a first ground. A second switch is connected at a first end to a bias voltage reference and at a second end to a gate of a biasing transistor and a second end of the capacitor. A third switch is connected at a first end to the first end of the capacitor and at a second end to the drain of the biasing transistor and a second ground. The first and the second switch are closed and the third switch is open to set a bias voltage on the capacitor. The first and second switch are open and the third switch is closed when the bias voltage is set on the capacitor.

Abstract: Apparatus, methods, and systems for providing a uniform bias voltage in a biasing circuit to a plurality of pixels. The biasing circuit has a plurality of switches, including a first switch connected at a first end of a capacitor and a second end connected to a first ground. A second switch is connected at a first end to a bias voltage reference and at a second end to a gate of a biasing transistor and a second end of the capacitor. A third switch is connected at a first end to the first end of the capacitor and at a second end to the drain of the biasing transistor and a second ground. The first and the second switch are closed and the third switch is open to set a bias voltage on the capacitor. The first and second switch are open and the third switch is closed when the bias voltage is set on the capacitor.

Abstract: A mechanism for discharging parasitic capacitance at an input of an operational amplifier, which is shared between two stages of a pipelined analog-to-digital converter and/or two channels of signal processing circuitry, before the amplifier configuration of the stages/channels is switched. The discharging act occurs when a short reset pulse is generated between two clock phases. The short reset pulse is applied to a switch connected to the operational amplifier input. When the reset pulse closes the switch, a discharge path is created and any parasitic capacitance at the operational amplifier input is discharged through the path. The discharging of the parasitic capacitance substantially mitigates the memory effect and the problems associated with the memory effect.

Abstract: Embodiments of a pixel read out circuit in an imager device is described. The pixel read out circuit includes an output node that is connected to a plurality of pixel cells. An output signal from a selected one of the plurality of pixel cells is applied to the output node. The pixel read out circuit also includes a clamp-out circuit that limits the magnitude of the output signal to a voltage determined by the voltage of a reference signal to prevent the output signal from reaching a level that might exceed the dynamic range of analog circuitry receiving the output signal.

Abstract: A mechanism for discharging parasitic capacitance at an input of an operational amplifier, which is shared between two stages of a pipelined analog-to-digital converter and/or two channels of signal processing circuitry, before the amplifier configuration of the stages/channels is switched. The discharging act occurs when a short reset pulse is generated between two clock phases. The short reset pulse is applied to a switch connected to the operational amplifier input. When the reset pulse closes the switch, a discharge path is created and any parasitic capacitance at the operational amplifier input is discharged through the path. The discharging of the parasitic capacitance substantially mitigates the memory effect and the problems associated with the memory effect.

Abstract: A configurable current source for imager readout system that can be operated as a simple-current-source or as a cascode-current-source. The configurable current source can be operated in a simple-current-source mode during circumstances when a low power supply voltage or large output signal swing is needed to output a pixel signal. The configurable current source can also be operated in a cascode-current-source mode for reduced nonlinearity and column-wise fixed pattern noise when power from a power supply is not a limitation. The configurable current source provides design flexibility and pixel optimization for imager development.

Abstract: A configurable current source for imager readout system that can be operated as a simple-current-source or as a cascode-current-source. The configurable current source can be operated in a simple-current-source mode during circumstances when a low power supply voltage or large output signal swing is needed to output a pixel signal. The configurable current source can also be operated in a cascode-current-source mode for reduced nonlinearity and column-wise fixed pattern noise when power from a power supply is not a limitation. The configurable current source provides design flexibility and pixel optimization for imager development.

Abstract: A mechanism for discharging parasitic capacitance at an input of an operational amplifier, which is shared between two stages of a pipelined analog-to-digital converter and/or two channels of signal processing circuitry, before the amplifier configuration of the stages/channels is switched. The discharging act occurs when a short reset pulse is generated between two clock phases. The short reset pulse is applied to a switch connected to the operational amplifier input. When the reset pulse closes the switch, a discharge path is created and any parasitic capacitance at the operational amplifier input is discharged through the path. The discharging of the parasitic capacitance substantially mitigates the memory effect and the problems associated with the memory effect.

Abstract: An imaging device with readout chain circuitry that uses multiple analog-to-digital converters and amplifiers, which are similarly calibrated using a stitching technique, to readout each color of a column and mitigate the possibility of a boundary effect.

Abstract: A configurable current source for imager readout system that can be operated as a simple-current-source or as a cascode-current-source. The configurable current source can be operated in a simple-current-source mode during circumstances when a low power supply voltage or large output signal swing is needed to output a pixel signal. The configurable current source can also be operated in a cascode-current-source mode for reduced nonlinearity and column-wise fixed pattern noise when power from a power supply is not a limitation. The configurable current source provides design flexibility and pixel optimization for imager development.

Abstract: A mechanism for discharging parasitic capacitance at an input of an operational amplifier, which is shared between two stages of a pipelined analog-to-digital converter and/or two channels of signal processing circuitry, before the amplifier configuration of the stages/channels is switched. The discharging act occurs when a short reset pulse is generated between two clock phases. The short reset pulse is applied to a switch connected to the operational amplifier input. When the reset pulse closes the switch, a discharge path is created and any parasitic capacitance at the operational amplifier input is discharged through the path. The discharging of the parasitic capacitance substantially mitigates the memory effect and the problems associated with the memory effect.

Abstract: A configurable current source for imager readout system that can be operated as a simple-current-source or as a cascode-current-source. The configurable current source can be operated in a simple-current-source mode during circumstances when a low power supply voltage or large output signal swing is needed to output a pixel signal. The configurable current source can also be operated in a cascode-current-source mode for reduced nonlinearity and column-wise fixed pattern noise when power from a power supply is not a limitation. The configurable current source provides design flexibility and pixel optimization for imager development.

Abstract: An imager with a slew rate control circuit that uses multiple digital control signals to control the rising and falling slew rates of boosted signals, such as transistor gate signals, and/or supply voltages used by an imager or other device. By using digital signals, the invention provides slew rate control that is less affected by power supply, temperature and process variations.