Patents by Inventor Chiaki Ishioka

Chiaki Ishioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9994063
    Abstract: A booklet includes a sheet-like first substrate, and a sheet-like second substrate that is attached to the first substrate. The first substrate includes a light-transmitting region, and an optical functional unit is provided to the light-transmitting region. A latent image is provided to a surface of the second substrate that is opposite to the first substrate at a position corresponding to the optical functional unit. The latent image manifests when the optical functional unit operates by overlapping the first substrate with the second substrate.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: June 12, 2018
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventors: Chiaki Ishioka, Yoshiyuki Mizuguchi, Yoshiaki Hashimoto
  • Publication number: 20130257032
    Abstract: A booklet includes a sheet-like first substrate, and a sheet-like second substrate that is attached to the first substrate. The first substrate includes a light-transmitting region, and an optical functional unit is provided to the light-transmitting region. A latent image is provided to a surface of the second substrate that is opposite to the first substrate at a position corresponding to the optical functional unit. The latent image manifests when the optical functional unit operates by overlapping the first substrate with the second substrate.
    Type: Application
    Filed: March 12, 2013
    Publication date: October 3, 2013
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Chiaki ISHIOKA, Yoshiyuki MIZUGUCHI, Yoshiaki HASHIMOTO
  • Patent number: 8232630
    Abstract: Even when a mold part of an IC module is exposed from an opening provided in a substrate of an inlay, occurrence of malfunction, communication disorders or the like of the IC module due to the influence of an external impact or the like is prevented. By combining a sealing member including an insulating layer and an adhesive layer in a stacked manner to a shape covering a mold part of the IC module, occurrence of malfunction, communication disorders or the like of the IC module is prevented even if there is an influence of an external impact or the like. Meanwhile, by providing a sealing member, concentration of stress on the mold part in a line pressure test is alleviated by limiting the size of the sealing member, and also occurrence of cracks in the mold part can be prevented.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: July 31, 2012
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Yutaka Ohira, Chiaki Ishioka
  • Publication number: 20110169146
    Abstract: Even when a mold part of an IC module is exposed from an opening provided in a substrate of an inlay, occurrence of malfunction, communication disorders or the like of the IC module due to the influence of an external impact or the like is prevented. By combining a sealing member including an insulating layer and an adhesive layer in a stacked manner to a shape covering a mold part of the IC module, occurrence of malfunction, communication disorders or the like of the IC module is prevented even if there is an influence of an external impact or the like. Meanwhile, by providing a sealing member, concentration of stress on the mold part in a line pressure test is alleviated by limiting the size of the sealing member, and also occurrence of cracks in the mold part can be prevented.
    Type: Application
    Filed: March 23, 2011
    Publication date: July 14, 2011
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Yutaka OHIRA, Chiaki ISHIOKA