Abstract: It is possible to detect a failure in a temperature sensor while preventing enlarging of a circuit scale. A temperature measurement circuit 10 includes temperature sensors 20 and 30, and a comparator 40. The temperature sensor 20 includes a temperature detection unit 21 including a resistive element, a resistance value of which varies in accordance with temperature changes, and an AD converter which converts a voltage of the temperature detection unit 21 into a temperature digital value D1. The temperature sensor 30 includes a ring oscillator 31 which oscillates at a cycle that is temperature dependent, and generates a digital value D2 based on an oscillating signal output by the ring oscillator 31. The comparator 40 compares the temperature digital values D1 and D2, and outputs a signal indicating whether the temperature sensor 20 is normal or not based on a comparison result.

Abstract: In one embodiment, a semiconductor device (20) includes a semiconductor chip (200) in which functional blocks (201, 202, 203 etc.) and a temperature sensor (208) are integrated. In this embodiment, in response to a change in an operation state of the semiconductor device (20), the on-chip temperature sensor (208) operates to switch from a continuous operation in which it continuously measures a chip temperature to an intermittent operation in which it intermittently measures the chip temperature, or to change a time interval between intermittent measurements of the chip temperature.

Abstract: It is possible to detect a failure in a temperature sensor while preventing enlarging of a circuit scale. A temperature measurement circuit 10 includes temperature sensors 20 and 30, and a comparator 40. The temperature sensor 20 includes a temperature detection unit 21 including a resistive element, a resistance value of which varies in accordance with temperature changes, and an AD converter which converts a voltage of the temperature detection unit 21 into a temperature digital value D1. The temperature sensor 30 includes a ring oscillator 31 which oscillates at a cycle that is temperature dependent, and generates a digital value D2 based on an oscillating signal output by the ring oscillator 31. The comparator 40 compares the temperature digital values D1 and D2, and outputs a signal indicating whether the temperature sensor 20 is normal or not based on a comparison result.

Abstract: In one embodiment, a semiconductor device (20) includes a semiconductor chip (200) in which functional blocks (201, 202, 203 etc.) and a temperature sensor (208) are integrated. In this embodiment, in response to a change in an operation state of the semiconductor device (20), the on-chip temperature sensor (208) operates to switch from a continuous operation in which it continuously measures a chip temperature to an intermittent operation in which it intermittently measures the chip temperature, or to change a time interval between intermittent measurements of the chip temperature.

Abstract: Whether an initial command outputted from a host is ‘CMD1’ or ‘CMD55+CMD41’ is detected with an initial command detection portion 8, and the result of detection is set in an SD/MMC register 13. Reset process for hardware and that for firmware are carried out based on the result of detection set in the SD/MMC register 13. Thereafter, a microcomputer 7 sets data indicating in which mode, MultiMedia Card mode or SD mode, the firmware reset process was carried out, in a F/W process SD/MMC register 14. A H/W-F/W mode comparison circuit 15 compares data in the SD/MMC register 13 with data in the F/W process SD/MMC register 14. If these data agree with each other, busy state is released, and command wait state is established. If they disagree with each other, a disagreement occurrence detection signal is outputted to the microcomputer 7, and power-on reset processing is performed again.

Abstract: A card device has a regulator (5), a first internal circuit (6) and a second internal circuit (7), and the regulator supplies, to the second internal circuit, an internal voltage generated by dropping an external voltage (VCC) when the external voltage is high, and exactly supplies the external voltage as the internal voltage to the second internal circuit when the external voltage is low, and the external voltage is supplied as an operating power source to the first internal circuit and a transition to a low consumed power state is carried out if a command is not input for a certain period. The card device stops the operation of the regulator and suppresses the supply of the internal voltage to the second internal circuit in the transition to the low consumed power state. In the low consumed power state, consequently, it is possible to suppress a power consumption in each of the regulator and the second internal circuit in the card device.

Abstract: Whether an initial command outputted from a host is ‘CMD1’ or ‘CMD55+CMD41’ is detected with an initial command detection portion 8, and the result of detection is set in an SD/MMC register 13. Reset process for hardware and that for firmware are carried out based on the result of detection set in the SD/MMC register 13. Thereafter, a microcomputer 7 sets data indicating in which mode, MultiMedia Card mode or SD mode, the firmware reset process was carried out, in a F/W process SD/MMC register 14. A H/W-F/W mode comparison circuit 15 compares data in the SD/MMC register 13 with data in the F/W process SD/MMC register 14. If these data agree with each other, busy state is released, and command wait state is established. If they disagree with each other, a disagreement occurrence detection signal is outputted to the microcomputer 7, and power-on reset processing is performed again.

Abstract: A card device has a regulator (5), a first internal circuit (6) and a second internal circuit (7), and the regulator supplies, to the second internal circuit, an internal voltage generated by dropping an external voltage (VCC) when the external voltage is high, and exactly supplies the external voltage as the internal voltage to the second internal circuit when the external voltage is low, and the external voltage is supplied as an operating power source to the first internal circuit and a transition to a low consumed power state is carried out if a command is not input for a certain period. The card device stops the operation of the regulator and suppresses the supply of the internal voltage to the second internal circuit in the transition to the low consumed power state. In the low consumed power state, consequently, it is possible to suppress a power consumption in each of the regulator and the second internal circuit in the card device.

Abstract: Disclosed herewith is a semiconductor processing system such as a card type electronic device, which can easily cope with an error caused by power shutoff that occurs when the card is ejected. The semiconductor processing system is provided with an interface control circuit and a processing circuit and receives operation power from an external device such as a card slot when it is inserted therein. According to a first aspect of the present invention for coping with an error caused by power shutoff that occurs when the card is ejected, the interface control circuit, when the card is ejected from the card slot, detects a potential change to occur at a first external terminal to be disconnected from a predetermined terminal of the card slot before the power supply from the card slot is shut off, then instructs the processing circuit that is active to perform an ending processing. The semiconductor processing system can end the processing by itself before the power supply stops completely.

Abstract: A card device has a regulator (5), a first internal circuit (6) and a second internal circuit (7), and the regulator supplies, to the second internal circuit, an internal voltage generated by dropping an external voltage (VCC) when the external voltage is high, and exactly supplies the external voltage as the internal voltage to the second internal circuit when the external voltage is low, and the external voltage is supplied as an operating power source to the first internal circuit and a transition to a low consumed power state is carried out if a command is not input for a certain period. The card device stops the operation of the regulator and suppresses the supply of the internal voltage to the second internal circuit in the transition to the low consumed power state. In the low consumed power state, consequently, it is possible to suppress a power consumption in each of the regulator and the second internal circuit in the card device.

Abstract: Disclosed is a nonvolatile memory apparatus in which a nonvolatile memory and a controller are mounted and which realizes improved performance of read/write speeds and improved resistance to a retention error. A nonvolatile memory can store information of two bits or more, and can perform a first reading operation of outputting information read from a nonvolatile memory cell as 1-bit information and a second reading operation of outputting the read information as 2-bit information. A controller performs the first reading operation to read first information from the nonvolatile memory and performs the second reading operation to read second information. The reading speed of the first reading operation is faster than that of the second reading operation.

Abstract: A memory card and a microcomputer with nonvolatile memory wherein operation under two different types of power supply specifications achieved are provided. A MultiMediacard includes a flash memory and with the flash memory. When the controller judges the level of supply voltage supplied from host equipment, operates as follows: the controller judges whether detecting point corresponding to voltage level 1.8V system been exceeded. After the judgment of excess, the controller judges whether detecting point corresponding to the voltage level system has been exceeded. When the 1.8V system, flash memory to operate the controller causes the 1.8v-system operation mode without driving regulators voltage level shifters. When the supply voltage level 3.3V system, the controller drives the regulators and the level shifters convert the voltage level causes the flash memory operate the 3.3V-system operation mode.

Abstract: Whether an initial command outputted from a host is ‘CMD1’ or ‘CMD55+CMD41’ is detected with an initial command detection portion 8, and the result of detection is set in an SD/MMC register 13. Reset process for hardware and that for firmware are carried out based on the result of detection set in the SD/MMC register 13. Thereafter, a microcomputer 7 sets data indicating in which mode, MultiMedia Card mode or SD mode, the firmware reset process was carried out, in a F/W process SD/MMC register 14. A H/W-F/W mode comparison circuit 15 compares data in the SD/MMC register 13 with data in the F/W process SD/MMC register 14. If these data agree with each other, busy state is released, and command wait state is established. If they disagree with each other, a disagreement occurrence detection signal is outputted to the microcomputer 7, and power-on reset processing is performed again.

Abstract: A nonvolatile storage apparatus which is not deadlocked even if a data processing section gets out of control during a power-on reset is provided. The nonvolatile storage apparatus includes a first semiconductor device having a data processing section capable of executing instructions and an external interface section, and a second semiconductor device controlled by the first semiconductor device. The external interface section, upon detecting that an operating supply voltage supplied from outside the nonvolatile storage apparatus has reached or exceeded a prescribed voltage, responds to an initialization command supplied from outside the nonvolatile storage apparatus and makes the data processing section start reset exception processing. After the reset exception processing is completed, the external interface section does not respond to the initialization command.

Abstract: A nonvolatile memory has an erase table in which a free-space information flag is associated with each physical address of a memory area and an address translation table in which a physical address of a memory area is associated with each logical address. The free-space information flag indicates whether a corresponding memory area is permitted to be erased. A control circuit determines a memory area to which rewrite data is to be written by referring to the free-space information flag, reflects the physical address and the logical address of the memory area to which the data is written into the address translation table, and updates the free-space information flag. The memory area to which rewrite data is to be written is determined by referring to the free-space information flag, and rewriting is not performed in the same memory area.

Abstract: A memory card and a microcomputer with nonvolatile memory wherein operation under two different types of power supply specifications is achieved are provided. A MultiMediaCard comprises a flash memory and a controller which controls the operation associated with the flash memory. When the controller judges the level of supply voltage supplied from host equipment, it operates as follows: the controller judges whether detecting point corresponding to the voltage level of 1.8V system has been exceeded. After the judgment of excess, the controller judges whether detecting point corresponding to the voltage level of 3.3V system has been exceeded. When the supply voltage is at the voltage level of 1.8V system, the controller causes the flash memory to operate in the 1.8V-system operation mode without driving regulators or level shifters. When the supply voltage is at the voltage level of 3.

Abstract: A memory card and a microcomputer with nonvolatile memory wherein operation under two different types of power supply specifications is achieved are provided. A MultiMediaCard includes a flash memory and a controller which controls the operation associated with the flash memory. When the controller judges the level of supply voltage supplied from host equipment, it operates as follows: the controller judges whether detecting point corresponding to the voltage level of 1.8V system has been exceeded. After the judgment of excess, the controller judges whether detecting point corresponding to the voltage level of 3.3V system has been exceeded. When the supply voltage is at the voltage level of 1.8V system, the controller causes the flash memory to operate in the 1.8V-system operation mode without driving regulators or level shifters. When the supply voltage is at the voltage level of 3.

Abstract: A memory card and a microcomputer with nonvolatile memory wherein operation under two different types of power supply specifications is achieved are provided. A MultiMediaCard comprises a flash memory and a controller which controls the operation associated with the flash memory. When the controller judges the level of supply voltage supplied from host equipment, it operates as follows: the controller judges whether detecting point corresponding to the voltage level of 1.8V system has been exceeded. After the judgment of excess, the controller judges whether detecting point corresponding to the voltage level of 3.3V system has been exceeded. When the supply voltage is at the voltage level of 1.8V system, the controller causes the flash memory to operate in the 1.8V-system operation mode without driving regulators or level shifters. When the supply voltage is at the voltage level of 3.

Abstract: Disclosed herewith is a semiconductor processing system such as a card type electronic device, which can easily cope with an error caused by power shutoff that occurs when the card is ejected. The semiconductor processing system is provided with an interface control circuit and a processing circuit and receives operation power from an external device such as a card slot when it is inserted therein. According to a first aspect of the present invention for coping with an error caused by power shutoff that occurs when the card is ejected, the interface control circuit, when the card is ejected from the card slot, detects a potential change to occur at a first external terminal to be disconnected from a predetermined terminal of the card slot before the power supply from the card slot is shut off, then instructs the processing circuit that is active to perform an ending processing. The semiconductor processing system can end the processing by itself before the power supply stops completely.

Abstract: The present invention provides a memory card in which stored information is not lost undesirably even when an operation power source is shut down during an erasing/writing process. A nonvolatile memory has an erase table in which a free-space information flag is associated with each physical address of a memory area and an address translation table in which a physical address of a memory area is associated with each logical address. The free-space information flag indicates whether a corresponding memory area is permitted to be erased or not. A control circuit determines a memory area to which rewrite data is to be written by referring to the free-space information flag of the erase table, reflects the physical address and the logical address of the memory area to which the data is written into the address translation table, and updates the free-space information flag of the erase table.