Abstract: A transition delay test is conducted such that an internal circuit that is a test object circuit in a semiconductor device is divided into a plurality of circuit blocks and a determination test is conducted while changing concurrently operating circuit blocks, a power supply noise generated during conduction of the determination test is detected, a suitable circuit scale on which the transition delay test can be normally conducted without being affected by the influence of the power supply noise is determined based on the result of the determination test and the detected power supply noise, and clocks to be supplied to the circuit blocks are controlled based on the determination result to limit the number of the concurrently operating circuit blocks.

Abstract: A transition delay test is conducted such that an internal circuit that is a test object circuit in a semiconductor device is divided into a plurality of circuit blocks and a determination test is conducted while changing concurrently operating circuit blocks, a power supply noise generated during conduction of the determination test is detected, a suitable circuit scale on which the transition delay test can be normally conducted without being affected by the influence of the power supply noise is determined based on the result of the determination test and the detected power supply noise, and clocks to be supplied to the circuit blocks are controlled based on the determination result to limit the number of the concurrently operating circuit blocks.

Abstract: A semiconductor device includes a pad composed of plural wiring layers and a power supply ring to provide a power supply provided through the pad for the power supply to an internal circuit, and the pad for the power supply and the power supply ring are connected by vias provided respectively above and below the power supply ring. Consequently, even if the width of the pad is narrowed, the number of vias disposed to connect the pad for the power supply and the power supply ring can be at least doubled compared to the conventional one to increase the amount of a current which can be provided to the power supply ring, which makes it possible to provide the sufficient current from outside to the power supply ring even in the semiconductor device with the narrow-width pad.

Abstract: A semiconductor device includes a pad composed of plural wiring layers and a power supply ring to provide a power supply provided through the pad for the power supply to an internal circuit, and the pad for the power supply and the power supply ring are connected by vias provided respectively above and below the power supply ring. Consequently, even if the width of the pad is narrowed, the number of vias disposed to connect the pad for the power supply and the power supply ring can be at least doubled compared to the conventional one to increase the amount of a current which can be provided to the power supply ring, which makes it possible to provide the sufficient current from outside to the power supply ring even in the semiconductor device with the narrow-width pad.