Patents by Inventor Chiaki Sakai

Chiaki Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8524574
    Abstract: A method for manufacturing a solid-state image device which includes the steps of: forming a silicon epitaxial growth layer on a silicon substrate; forming photoelectric conversion portions, transfer gates, and a peripheral circuit portion in and/or on the silicon epitaxial growth layer and further forming a wiring layer on the silicon epitaxial growth layer; forming a split layer in the silicon substrate at a side of the silicon epitaxial growth layer; forming a support substrate on the wiring layer; peeling the silicon substrate from the split layer so as to leave a silicon layer formed of a part of the silicon substrate at a side of the support substrate; and planarizing the surface of the silicon layer.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: September 3, 2013
    Assignee: Sony Corporation
    Inventor: Chiaki Sakai
  • Patent number: 8383446
    Abstract: A solid-state imaging device includes: a photoelectric conversion portion that receives an incident light from a back surface side of a silicon layer to perform photoelectric conversion on the incident light; and a pixel transistor portion that outputs signal charges generated in the photoelectric conversion portion towards a front surface side of the silicon layer, wherein a gettering layer having internal stress is provided on the front surface side of the silicon layer at a position to overlap the photoelectric conversion portion on a plan view layout thereof.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: February 26, 2013
    Assignee: Sony Corporation
    Inventor: Chiaki Sakai
  • Publication number: 20120322193
    Abstract: A solid-state imaging device includes: a photoelectric conversion portion that receives an incident light from a back surface side of a silicon layer to perform photoelectric conversion on the incident light; and a pixel transistor portion that outputs signal charges generated in the photoelectric conversion portion towards a front surface side of the silicon layer, wherein a gettering layer having internal stress is provided on the front surface side of the silicon layer at a position to overlap the photoelectric conversion portion on a plan view layout thereof.
    Type: Application
    Filed: August 15, 2012
    Publication date: December 20, 2012
    Applicant: SONY CORPORATION
    Inventor: Chiaki Sakai
  • Patent number: 8294185
    Abstract: A solid-state imaging device includes: a photoelectric conversion portion that receives an incident light from a back surface side of a silicon layer to perform photoelectric conversion on the incident light; and a pixel transistor portion that outputs signal charges generated in the photoelectric conversion portion towards a front surface side of the silicon layer, wherein a gettering layer having internal stress is provided on the front surface side of the silicon layer at a position to overlap the photoelectric conversion portion on a plan view layout thereof.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: October 23, 2012
    Assignee: Sony Corporation
    Inventor: Chiaki Sakai
  • Publication number: 20110136295
    Abstract: A method for manufacturing a solid-state image device which includes the steps of: forming a silicon epitaxial growth layer on a silicon substrate; forming photoelectric conversion portions, transfer gates, and a peripheral circuit portion in and/or on the silicon epitaxial growth layer and further forming a wiring layer on the silicon epitaxial growth layer; forming a split layer in the silicon substrate at a side of the silicon epitaxial growth layer; forming a support substrate on the wiring layer; peeling the silicon substrate from the split layer so as to leave a silicon layer formed of a part of the silicon substrate at a side of the support substrate; and planarizing the surface of the silicon layer.
    Type: Application
    Filed: February 17, 2011
    Publication date: June 9, 2011
    Applicant: SONY CORPORATION
    Inventor: Chiaki Sakai
  • Patent number: 7897427
    Abstract: There is provided a method for manufacturing a solid-state image device which includes the steps of: forming a silicon epitaxial growth layer on a silicon substrate; forming photoelectric conversion portions, transfer gates, and a peripheral circuit portion in and/or on the silicon epitaxial growth layer and further forming a wiring layer on the silicon epitaxial growth layer; forming a split layer in the silicon substrate at a side of the silicon epitaxial growth layer; forming a support substrate on the wiring layer; peeling the silicon substrate from the split layer so as to leave a silicon layer formed of a part of the silicon substrate at a side of the support substrate; and planarizing the surface of the silicon layer.
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: March 1, 2011
    Assignee: Sony Corporation
    Inventor: Chiaki Sakai
  • Patent number: 7851880
    Abstract: A solid-state imaging device includes a semiconductor substrate having a foreside provided with an imaging area and an electrode pad, the imaging area having an array of optical sensors, the electrode pad being disposed around a periphery of the imaging area; a transparent substrate joined to the foreside of the semiconductor substrate with a sealant therebetween; underside wiring that extends through the semiconductor substrate from the electrode pad to an underside of the semiconductor substrate; and a protective film composed of an inorganic insulating material and interposed between the semiconductor substrate and the sealant, the protective film covering at least the electrode pad.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: December 14, 2010
    Assignee: Sony Corporation
    Inventors: Masami Suzuki, Yoshimichi Harada, Yoshihiro Nabe, Yuji Takaoka, Masaaki Takizawa, Chiaki Sakai
  • Publication number: 20100214457
    Abstract: A solid-state imaging device includes: a photoelectric conversion portion that receives an incident light from a back surface side of a silicon layer to perform photoelectric conversion on the incident light; and a pixel transistor portion that outputs signal charges generated in the photoelectric conversion portion towards a front surface side of the silicon layer, wherein a gettering layer having internal stress is provided on the front surface side of the silicon layer at a position to overlap the photoelectric conversion portion on a plan view layout thereof.
    Type: Application
    Filed: February 12, 2010
    Publication date: August 26, 2010
    Applicant: Sony Corporation
    Inventor: Chiaki Sakai
  • Publication number: 20100184246
    Abstract: There is provided a method for manufacturing a solid-state image device which includes the steps of: forming a silicon epitaxial growth layer on a silicon substrate; forming photoelectric conversion portions, transfer gates, and a peripheral circuit portion in and/or on the silicon epitaxial growth layer and further forming a wiring layer on the silicon epitaxial growth layer; forming a split layer in the silicon substrate at a side of the silicon epitaxial growth layer; forming a support substrate on the wiring layer; peeling the silicon substrate from the split layer so as to leave a silicon layer formed of a part of the silicon substrate at a side of the support substrate; and planarizing the surface of the silicon layer.
    Type: Application
    Filed: January 12, 2010
    Publication date: July 22, 2010
    Applicant: SONY CORPORATION
    Inventor: Chiaki Sakai
  • Publication number: 20080128848
    Abstract: A solid-state imaging device includes a semiconductor substrate having a foreside provided with an imaging area and an electrode pad, the imaging area having an array of optical sensors, the electrode pad being disposed around a periphery of the imaging area; a transparent substrate joined to the foreside of the semiconductor substrate with a sealant therebetween; underside wiring that extends through the semiconductor substrate from the electrode pad to an underside of the semiconductor substrate; and a protective film composed of an inorganic insulating material and interposed between the semiconductor substrate and the sealant, the protective film covering at least the electrode pad.
    Type: Application
    Filed: November 26, 2007
    Publication date: June 5, 2008
    Applicant: SONY CORPORATION
    Inventors: Masami Suzuki, Yoshimichi Harada, Yoshihiro Nabe, Yuji Takaoka, Masaaki Takizawa, Chiaki Sakai
  • Patent number: 5490232
    Abstract: A computer-aided design system simulates the designer thought processes by the provision of a plurality of discrete unit programs provided respectively for individual design items, Each of the unit programs includes a thought process portion, a knowledge portion and a recognition portion. The thought process portion is for receiving an input instruction via an input device, executing logic operations in accordance with the input instruction to obtain logic results, and transferring the logic results to a related unit program. The related unit program receives the logic results and executes logic operations in accordance with the received logic results to obtain new logic results. The knowledge portion of each unit program is provided for storing the various logic results, and the recognition portion of each unit program is provided for identifying the related unit program which is related to the logic results obtained by executing the logic operations.
    Type: Grant
    Filed: April 5, 1994
    Date of Patent: February 6, 1996
    Assignee: Daiwa House Industry Co., Ltd.
    Inventors: Norihide Asano, Chiaki Sakai, Masanobu Momota
  • Patent number: 5162892
    Abstract: A thin film semiconductor device with a polycrystalline silicon film forming an active channel region, a source region and a drain region, is encapsulated in a passivation layer which also serves as a source of free hydrogen. Migration of hydrogen into the active region improves the effective carrier mobility, the threshold voltage and the gate voltage of the device by reducing carrier trap density thereof. The passivation layer is activated during annealing to drive hydrogen through porous or transmissive layers of the device to the active region. Effective mobilities of up to 100 cm.sup.2 /V sec can be achieved in the preferred construction. The semicondcutor device can be fabricated in the form of IC chips.
    Type: Grant
    Filed: May 17, 1991
    Date of Patent: November 10, 1992
    Assignee: Sony Corporation
    Inventors: Hisao Hayashi, Hisayoshi Yamoto, Chiaki Sakai
  • Patent number: 5082750
    Abstract: A magnetic recording medium having excellent noise characteristics and comprising a metal magnetic film formed on a nonmagnetic substrate and made of (1) a Co-Cr-Nb alloy, or (2) a Co-Cr-Ni-Nb alloy. The alloys (1) and (2) are represented respectively by the following formulae:Co.sub.1-x-z Cr.sub.x Nb.sub.z (1)Co.sub.1-x-y-z Cr.sub.x Ni.sub.y Nb.sub.z (2)wherein x, y and z each represent an atomic ratio, x is 0.08 to 0.15, y is 0.05 to 0.25 and z is 0.03 to 0.10.
    Type: Grant
    Filed: October 20, 1989
    Date of Patent: January 21, 1992
    Assignee: Kubota Ltd.
    Inventors: Toshiaki Morichika, Toshio Tani, Chiaki Sakai, Hideo Koshimoto, Tatsuhiko Kadowaki