Abstract: A method of forming shallow trench isolation in a semiconductor substrate. A hard mask having an opening is formed on the semiconductor substrate. The semiconductor substrate is etched through the opening to form a shallow trench. The semiconductor substrate such as silicon substrate is annealed in an ambient containing nitric oxide or nitrogen and oxygen to form a silicon oxynitride film on the shallow trench to serve as a barrier to prevent dopant source/drain outdiffusion. An insulator is then formed on the hard mask to fill the shallow trench. The insulator is planarized while the hard mask is used as the polishing stop layer. Thereafter, the hard mask is removed to expose the upper surface of the semiconductor substrate and leave a shallow trench isolation.

Abstract: A method of forming a STI structure. First, a substrate having a trench is provided. Next, a conformable silicon oxide layer is grown on the surface of the trench by wet oxidation using single wafer process to serve as a liner oxide layer. Thereafter, the substrate and the silicon oxide layer is in-situ annealed. Finally, an insulating layer is completely filled into the trench.

Abstract: A method of forming a STI structure. First, a substrate having a trench is provided. Next, a conformable silicon oxide layer is grown on the surface of the trench by wet oxidation using single wafer process to serve as a liner oxide layer. Thereafter, the substrate and the silicon oxide layer is in-situ annealed. Finally, an insulating layer is completely filled into the trench.

Abstract: A method of forming shallow trench isolation in a semiconductor substrate. A hard mask having an opening is formed on the semiconductor substrate. The semiconductor substrate is etched through the opening to form a shallow trench. The semiconductor substrate is annealed in an ambient containing argon gas at a temperature of about 1150 to about 1200° C. for 1 to 2 hrs. An insulator is then formed on the hard mask to fill the shallow trench. The insulator is planarized while the hard mask is used as the polishing stop layer. Thereafter, the hard mask is removed to expose the upper surface of the semiconductor substrate and leave a shallow trench isolation.

Abstract: A method of forming shallow trench isolation in a semiconductor substrate. A hard mask having an opening is formed on the semiconductor substrate. The semiconductor substrate is etched through the opening to form a shallow trench. The semiconductor substrate is annealed in an ambient containing argon gas at a temperature of about 1150 to about 1200° C. for 1 to 2 hrs. An insulator is then formed on the hard mask to fill the shallow trench. The insulator is planarized while the hard mask is used as the polishing stop layer. Thereafter, the hard mask is removed to expose the upper surface of the semiconductor substrate and leave a shallow trench isolation.

Abstract: A method of forming shallow trench isolation in a semiconductor substrate. A hard mask having an opening is formed on the semiconductor substrate. The semiconductor substrate is etched through the opening to form a shallow trench. The semiconductor substrate such as silicon substrate is annealed in an ambient containing nitric oxide or nitrogen and oxygen to form a silicon oxynitride film on the shallow trench to serve as a barrier to prevent dopant source/drain outdiffusion. An insulator is then formed on the hard mask to fill the shallow trench. The insulator is planarized while the hard mask is used as the polishing stop layer. Thereafter, the hard mask is removed to expose the upper surface of the semiconductor substrate and leave a shallow trench isolation.