Patents by Inventor Chian-Wen Chen

Chian-Wen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8264607
    Abstract: A method of sampling phase calibration and a device thereof is suitable for an analog-to-digital converter and phase lock loop (ADC-PLL). The ADC-PLL conducts sampling on a periodic analog signal according to a sampling phase so as to produce a plurality of digital signals. The sampling phase calibration device includes a storage unit, a motion-detecting unit and a control unit. The motion-detecting unit is to calculate the number of motion data corresponding to a sampling phase. The control unit is coupled to the motion-detecting unit for changing the sampling phase so as to obtain the number of motion data corresponding to each sampling phase and selecting the sampling phase corresponding to the minimum number of motion data as an optimal sampling phase. The ADC-PLL can correctly sample an analog signal by using the optimal sampling phase and reduce the influence of clock jitter to the minimum.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: September 11, 2012
    Assignee: Sunplus Technology Co., Ltd.
    Inventors: Chian-Wen Chen, Wei-Lung Lu, Jui-Yao Lee
  • Patent number: 8184204
    Abstract: In a de-ring system for reducing the overshooting and undershooting of a video signal after scaling on the horizontal and the vertical direction in a scaler, a region judgment device receives the video signal and detects the attributes of the region in the video signal. When the region in the video signal is an edge and flat area, the de-ring system adjusts the weighting coefficient to increase the low frequency components for reducing the overshooting and undershooting of the video signal. When the region in the video signal is neither an edge nor an edge and flat area, the de-ring system adjusts the weighting coefficient to increase the high frequency components for preserving the high frequency components of the video signal, so as to dramatically reduce the overshooting and undershooting of a video signal.
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: May 22, 2012
    Assignee: Sunplus Technology Co., Ltd
    Inventor: Chian-Wen Chen
  • Publication number: 20110304768
    Abstract: A method of sampling phase calibration and a device thereof is suitable for an analog-to-digital converter and phase lock loop (ADC-PLL). The ADC-PLL conducts sampling on a periodic analog signal according to a sampling phase so as to produce a plurality of digital signals. The sampling phase calibration device includes a storage unit, a motion-detecting unit and a control unit. The motion-detecting unit is to calculate the number of motion data corresponding to a sampling phase. The control unit is coupled to the motion-detecting unit for changing the sampling phase so as to obtain the number of motion data corresponding to each sampling phase and selecting the sampling phase corresponding to the minimum number of motion data as an optimal sampling phase. The ADC-PLL can correctly sample an analog signal by using the optimal sampling phase and reduce the influence of clock jitter to the minimum.
    Type: Application
    Filed: September 16, 2010
    Publication date: December 15, 2011
    Applicant: SUNPLUS TECHNOLOGY CO., LTD.
    Inventors: Chian-Wen Chen, Wei-Lung Lu, Jui-Yao Lee
  • Publication number: 20110181691
    Abstract: A system for decoding and de-interlacing CVBS signal includes a 2D luminance and chrominance separator, a chrominance to color difference converter, a synchronization and scaling device, a storage and a 3D luminance and chrominance separation, de-noise and de-interlacing device. The 2D luminance and chrominance separator generates 2D luminance and chrominance signals based on sampled CVBS signal. The chrominance to color difference converter converts the 2D chrominance signal into 2D color difference signal. The synchronization and scaling device synchronizes the sampled CVBS signal, 2D luminance signal, and 2D color difference signal for generating synchronized CVBS signal, synchronized 2D luminance signal, and synchronized 2D color difference signal. The storage buffers the synchronized CVBS signal, synchronized 2D luminance signal, and synchronized 2D color difference signal.
    Type: Application
    Filed: August 17, 2010
    Publication date: July 28, 2011
    Applicant: Sunplus Technology Co., Ltd.
    Inventors: Chian-Wen Chen, Tsung-Hang Chiang
  • Publication number: 20110037898
    Abstract: In a de-ring system for reducing the overshooting and undershooting of a video signal after scaling on the horizontal and the vertical direction in a scaler, a region judgment device receives the video signal and detects the attributes of the region in the video signal. When the region in the video signal is an edge and flat area, the de-ring system adjusts the weighting coefficient to increase the low frequency components for reducing the overshooting and undershooting of the video signal. When the region in the video signal is neither an edge nor an edge and flat area, the de-ring system adjusts the weighting coefficient to increase the high frequency components for preserving the high frequency components of the video signal, so as to dramatically reduce the overshooting and undershooting of a video signal.
    Type: Application
    Filed: January 12, 2010
    Publication date: February 17, 2011
    Applicant: Sunplus Technology Co., Ltd.
    Inventor: Chian-Wen Chen