Patents by Inventor Chiang-Sheng Yao

Chiang-Sheng Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6017808
    Abstract: A method for hardening of gate oxide without forming low dopant concentration regions at the gate oxide-polysilicon interface is described. Polysilicon is deposited onto gate oxide followed by nitrogen implantation and annealing. At this point nitrogen concentration peaks exist at the gate oxide interfaces with the single crystal substrate and the polysilicon gate electrode. This effectively hardens the gate oxide. A third polysilicon gate electrode exists in the bulk of the polysilicon gate electrode. In the described process the region of the polysilicon layer that contains the nitrogen concentration peak is removed. An electronically active dopant may then be implanted. Alternatively, a fresh polysilicon layer may then be deposited followed by implantation of an electronically active dopant. Thus, the method of the invention avoids retardation of electronically active dopant diffusion.
    Type: Grant
    Filed: October 24, 1997
    Date of Patent: January 25, 2000
    Assignee: LSI Logic Corporation
    Inventors: Shiuh-Luen Wang, Chiang-Sheng Yao, Wen-Chin Yeh