Patents by Inventor Chiao Chen

Chiao Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240304411
    Abstract: An inspection method for inspecting a semiconductor structure is provided. The semiconductor structure includes a first conductive line, a second conductive line, a first conductive line contact and first transistors connected to the first conductive line, and second transistors connected to the second conductive line, wherein each of the first transistors includes a first contact and each of the second transistors includes a second contact. The inspection method includes a pre-charge operation, irradiating the first conductive line contact with an electron beam; an imaging operation, obtaining an image of the semiconductor structure; and a determination operation, which determines whether the second contact of any one of the second transistors becomes bright in the image. In response to the second contact of the any one of the second transistors becoming bright, the determination operation determines that there is a defect between the first conductive line and the second conductive line.
    Type: Application
    Filed: March 6, 2023
    Publication date: September 12, 2024
    Applicant: Winbond Electronics Corp.
    Inventor: Yen-Chiao CHEN
  • Publication number: 20230010665
    Abstract: A semiconductor structure includes vertical conductive features disposed over a substrate, and horizontal conductive features disposed over the vertical conductive features. The horizontal conductive features include first and second conductive lines respectively electrically connected to the first and second vertical conductive features, a first conductive segment disposed between the first vertical conductive feature and the second conductive line, and a second conductive segment disposed between the first conductive line and the second vertical conductive feature. The first conductive segment is electrically isolated from the vertical conductive features. The second conductive segment is electrically isolated from the vertical conductive features.
    Type: Application
    Filed: June 16, 2022
    Publication date: January 12, 2023
    Applicant: Winbond Electronics Corp.
    Inventor: Yen-Chiao CHEN
  • Publication number: 20220118576
    Abstract: A system and a method for detecting tool status of a machine tool equipped with a controller and cutting tools are provided. The method includes the steps of: receiving a plurality of manufacturing signals; processing data from the manufacturing signals to organized information; selecting target features characterizing less noise, high effectiveness, and low multicollinearity from the organized information; fitting a classification model using tool status information with the organized information and the target features; obtaining tool status levels by using the classification model; and outputting tool treatments corresponding to the tool status levels.
    Type: Application
    Filed: December 23, 2020
    Publication date: April 21, 2022
    Inventors: Yu-Hsin Lin, Yun-Chiao Chen, Pei-Ning Wang, Bei-Hua Yang, Guan-Lun Cheng, Li-Yu Hsu
  • Patent number: 11131582
    Abstract: An optical sensing circuit includes a first, a second, and a third optical sensing element and a sampling circuit. The first sensing element provides a first current from a first node to a second node according to an ambient light and a sensing signal. The second optical sensing element drains a second current from the second node to the first node according to the ambient light and the sensing signal. The third optical sensing element is coupled between the first node and the second node. The third optical sensing element receives a first color light, and transmits the first current to the second node or transmits the second current to the first node according to the first color light. The sampling circuit is turned on according to the sampling signal to output a detection signal based on the voltage level of the second node.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: September 28, 2021
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Bo-Shiang Tzeng, Ching-Lang Hung, Chia-Wei Kuo, Chiao-Chen Yu
  • Publication number: 20200326234
    Abstract: An optical sensing circuit includes a first, a second, and a third optical sensing element and a sampling circuit. The first sensing element provides a first current from a first node to a second node according to an ambient light and a sensing signal. The second optical sensing element drains a second current from the second node to the first node according to the ambient light and the sensing signal. The third optical sensing element is coupled between the first node and the second node. The third optical sensing element receives a first color light, and transmits the first current to the second node or transmits the second current to the first node according to the first color light. The sampling circuit is turned on according to the sampling signal to output a detection signal based on the voltage level of the second node.
    Type: Application
    Filed: April 9, 2020
    Publication date: October 15, 2020
    Inventors: Bo-Shiang TZENG, Ching-Lang HUNG, Chia-Wei KUO, Chiao-Chen YU
  • Patent number: 10753960
    Abstract: A probe card includes a printed circuit board (PCB), a connection substrate electrically connected with the PCB, a probe head, and a signal path switching module disposed on a lateral periphery surface or a bottom surface of the connection substrate, electrically connected with probe needles of the probe head and the connection substrate and including first and second circuit lines with first and second inductors respectively, and a capacitor electrically connected between the first and second circuit lines. A test signal from a tester is transmitted between the tester and a device under test (DUT) via the PCB, the connection substrate, the first and second circuit lines and the probe needles. A loopback test signal from the DUT is transmitted back to the DUT via the probe needles, parts of the first and second circuit lines and the capacitor.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: August 25, 2020
    Assignee: MPI CORPORATION
    Inventors: Hao Wei, Chia-Nan Chou, Chien-Chiao Chen, Chia-An Yu, Yu-Hao Chen
  • Patent number: 10495176
    Abstract: An adjustable damper includes a base, a first and second slidable members, a movable seat, a mass unit, and a first and second cantilevers. The first slidable member is slidably disposed on the base in a first direction. The movable seat is slidably disposed on the base in a second direction orthogonal to the first direction. The second slidable member is slidably disposed on the movable seat in the second direction. The mass unit is slidably disposed on the movable seat in the first direction. The first cantilever is fixed to a first connecting member. The first connecting member is connected to the movable seat. The first slidable member movably is disposed on the first cantilever. The second cantilever is fixed to a second connecting member. The second connecting member is connected to the mass unit. The second slidable member is movably disposed on the second cantilever.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: December 3, 2019
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hung-I Lu, Chien-Chih Liao, Jen-Ji Wang, Yun-Chiao Chen
  • Publication number: 20190145480
    Abstract: An adjustable damper includes a base, a first and second slidable members, a movable seat, a mass unit, and a first and second cantilevers. The first slidable member is slidably disposed on the base in a first direction. The movable seat is slidably disposed on the base in a second direction orthogonal to the first direction. The second slidable member is slidably disposed on the movable seat in the second direction. The mass unit is slidably disposed on the movable seat in the first direction. The first cantilever is fixed to a first connecting member. The first connecting member is connected to the movable seat. The first slidable member movably is disposed on the first cantilever. The second cantilever is fixed to a second connecting member. The second connecting member is connected to the mass unit. The second slidable member is movably disposed on the second cantilever.
    Type: Application
    Filed: December 21, 2017
    Publication date: May 16, 2019
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hung-I LU, Chien-Chih LIAO, Jen-Ji WANG, Yun-Chiao CHEN
  • Publication number: 20190120877
    Abstract: A probe card includes a printed circuit board (PCB), a connection substrate electrically connected with the PCB, a probe head, and a signal path switching module disposed on a lateral periphery surface or a bottom surface of the connection substrate, electrically connected with probe needles of the probe head and the connection substrate and including first and second circuit lines with first and second inductors respectively, and a capacitor electrically connected between the first and second circuit lines. A test signal from a tester is transmitted between the tester and a device under test (DUT) via the PCB, the connection substrate, the first and second circuit lines and the probe needles. A loopback test signal from the DUT is transmitted back to the DUT via the probe needles, parts of the first and second circuit lines and the capacitor.
    Type: Application
    Filed: October 11, 2018
    Publication date: April 25, 2019
    Inventors: Hao WEI, Chia-Nan CHOU, Chien-Chiao CHEN, Chia-An YU, Yu-Hao CHEN
  • Patent number: 10211791
    Abstract: A hybrid RF transceiver circuit comprises a first matching network, a second matching network, a first power amplifier, a second power amplifier, and a low noise amplifier. The second matching network is coupled to the first matching network and an antenna. An output port of the first power amplifier is coupled to the first matching network and the second matching network. The output port of the second power amplifier is coupled to the first matching network. The input port of the low noise amplifier is coupled to the second power amplifier and the first matching network. The output port of the low noise amplifier is coupled to a receiver circuit.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: February 19, 2019
    Assignee: GEAR RADIO ELECTRONICS CORP.
    Inventors: Min-Chiao Chen, Tao-Yi Lee
  • Publication number: 20180351517
    Abstract: A hybrid RF transceiver circuit comprises a first matching network, a second matching network, a first power amplifier, a second power amplifier, and a low noise amplifier. The second matching network is coupled to the first matching network and an antenna. An output port of the first power amplifier is coupled to the first matching network and the second matching network. The output port of the second power amplifier is coupled to the first matching network. The input port of the low noise amplifier is coupled to the second power amplifier and the first matching network. The output port of the low noise amplifier is coupled to a receiver circuit.
    Type: Application
    Filed: September 12, 2017
    Publication date: December 6, 2018
    Applicant: GEAR RADIO ELECTRONICS CORP.
    Inventors: MIN-CHIAO CHEN, TAO-YI LEE
  • Publication number: 20180158598
    Abstract: An inductor equipped with imbalanced magnetic-cancelling (IMC) architecture and an associated apparatus are provided. The inductor may include a first terminal, a second terminal, and a plurality of partial wirings coupled between the first terminal and the second terminal. The plurality of partial wirings may include a first set of partial wirings coupled in series and coupled to the first terminal, a second set of partial wirings coupled in series and coupled to the second terminal, and a third set of partial wirings coupled in series and coupled between the first set of partial wirings and the second set of partial wirings. Additionally, a second area enclosed by the first set of partial wirings and the second set of partial wirings is different from a first area enclosed by the third set of partial wirings, to provide the inductor with the IMC architecture.
    Type: Application
    Filed: February 16, 2017
    Publication date: June 7, 2018
    Inventors: Min-Chiao Chen, Tao-Yi Lee, Tsung-Ling Li
  • Patent number: 9653408
    Abstract: A high-frequency package comprises a die; a plurality of leads; and a die pad; wherein a surface of the die pad is lower than top surfaces of the plurality of leads, the die is disposed on the die pad with the lower surface, such that a top surface of the die is substantially aligned with the top surfaces of the plurality of leads.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: May 16, 2017
    Assignee: WIN Semiconductors Corp.
    Inventors: Chih-Wen Huang, Yu-Chiao Chen
  • Publication number: 20170047299
    Abstract: A high-frequency package comprises a die; a plurality of leads; and a die pad; wherein a surface of the die pad is lower than top surfaces of the plurality of leads, the die is disposed on the die pad with the lower surface, such that a top surface of the die is substantially aligned with the top surfaces of the plurality of leads.
    Type: Application
    Filed: October 14, 2015
    Publication date: February 16, 2017
    Inventors: Chih-Wen Huang, Yu-Chiao Chen
  • Patent number: 9515032
    Abstract: A high-frequency package comprises a ground lead, connected to a die, occupying a side of the high-frequency package, wherein a slot is formed within the ground lead; and a signal lead, connected to the die, disposed within the slot; wherein the ground lead surrounds the signal lead, and the ground lead and the signal lead form as a ground-signal-ground structure.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: December 6, 2016
    Assignee: WIN Semiconductors Corp.
    Inventors: Chih-Wen Huang, Yu-Chiao Chen
  • Patent number: 9177712
    Abstract: A transformer includes a first planar coil having two input ends, with a distance being between the two input ends; and a second planar coil, having two output ends. The two input ends correspond to two points on relative positions of the second planar coil, and a coil path distance of the two points on the second planar coil is equal to the distance.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: November 3, 2015
    Assignee: MStar Semiconductor, Inc.
    Inventor: Min-Chiao Chen
  • Patent number: 8330522
    Abstract: A transconductor circuit used in a mixer for canceling second-order inter-modulation distortion includes a first transistor and a second transistor, of which the base (gate) ends coupled to a first input end and a second input end, for receiving a differential input signal; and a negative feedback circuit, of which the input end coupled to the emitter (source) ends of the first transistor and the second transistor, of which the out end coupled to the base (gate) ends of the first transistor and the second transistor, for adjusting the voltage of the base (gate) of the first transistor and the second transistor according to the difference between a reference voltage and the detected voltage of the emitter (source) of the first transistor and the second transistor.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: December 11, 2012
    Assignee: MStar Semiconductor, Inc.
    Inventors: Min-Chiao Chen, Shuo Yuan Hsiao
  • Publication number: 20120184126
    Abstract: A cable connector assembly (100) comprises an insulative housing (1), a printed circuit board (2) received in the insulative housing, a cable (3) electrically connected with the printed circuit board and an insulative cover (4) assembled to the insulative housing. The insulative housing has a body portion (10) with a receiving slot (101) and a pair of tongue sections (110, 111) opposite to each other and respectively extending forwardly from a front surface of the body portion. The printed circuit board is extending along a mating direction, and the cable is extending along a direction perpendicular to the mating direction, the cover is over-molded on the cable and the printed circuit board, and engaging with the insulative housing.
    Type: Application
    Filed: January 13, 2012
    Publication date: July 19, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Chiao Chen, Xian-Bao Su, Li-Hua Zhu
  • Publication number: 20120181060
    Abstract: A flexible flat cable (1) comprises: a plurality of conductors (21) arranged along a transversal direction and paralleled with each other; an insulator (22) enclosing the plurality of conductors. The insulator defines a cutout formed on a top surface thereof to make a length of the plurality of conductors exposed out of the insulator for coupling with an electrical connector. And a first insulative layer (23), a second insulative layer (24) and a metallic layer (25) are stacked with each other and attached onto the top surface of the insulator and arranged from inside to outside in turn. And the first and second insulative layers are formed by different materials.
    Type: Application
    Filed: January 13, 2012
    Publication date: July 19, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Chiao Chen, Xian-Bao Su, Feng-Hua Liu
  • Patent number: 8134823
    Abstract: In order to avoid the capacitors in a stacked capacitor structure suiting a miniaturization process from collapsing to cause a short-circuit, separated reinforced structures are used and disposed at the outer-sidewalls of the capacitor, which not only reduces the space occupied by the reinforced structure to increase the surface areas of the upper electrode and the lower electrode of the capacitor, but also allows the capacitor to be deflected but collapse-proof and there are more spaces between the capacitors, so as to solve the filling difficulty problem due to a too small filling space in a successive process of depositing conductive material into the filling space.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: March 13, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Wen-Hwa Chen, Hsien-Chie Cheng, Yun-Chiao Chen, Su-Tsai Lu