Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a reinforcing sheet. The base film includes a first surface, a second surface opposite to the first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The reinforcing sheet is disposed on the first surface and/or the second surface and exposes the chip, wherein a flexibility of the reinforcing sheet is substantially equal to or greater than a flexibility of the base film.

Abstract: A chip structure including a chip body and a plurality of conductive bumps. The chip body includes an active surface and a plurality of bump pads disposed on the active surface. The conductive bumps are disposed on the active surface of the chip body and connected to the bump pads respectively, and at least one of the conductive bumps has a trapezoid shape having one pair of parallel sides and one pair of non-parallel sides.

Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a reinforcing sheet. The base film includes a first surface, a second surface opposite to the first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The reinforcing sheet is disposed on the first surface and/or the second surface and exposes the chip, wherein a flexibility of the reinforcing sheet is substantially equal to or greater than a flexibility of the base film.

Abstract: A chip structure including a chip body and a plurality of conductive bumps. The chip body includes an active surface and a plurality of bump pads disposed on the active surface. The conductive bumps are disposed on the active surface of the chip body and connected to the bump pads respectively, and at least one of the conductive bumps has a trapezoid shape having one pair of parallel sides and one pair of non-parallel sides.

Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a reinforcing sheet. The base film includes a first surface, a second surface opposite to the first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The reinforcing sheet is disposed on the first surface and/or the second surface and exposes the chip, wherein a flexibility of the reinforcing sheet is substantially equal to or greater than a flexibility of the base film.

Abstract: A chip structure including a chip body and a plurality of conductive bumps. The chip body includes an active surface and a plurality of bump pads disposed on the active surface. The conductive bumps are disposed on the active surface of the chip body and connected to the bump pads respectively, and at least one of the conductive bumps has a trapezoid shape having one pair of parallel sides and one pair of non-parallel sides.

Abstract: A chip on glass package assembly includes a glass substrate, a first type chip, a second type chip and a plurality of connecting lines. The glass substrate includes an active area and a peripheral area connected to the active area. The first type chip is mounted on the peripheral area and including a processor. The second type chip is mounted on the peripheral area and located on a side of the first type chip, wherein the second type chip is different from the first type chip. The connecting lines are disposed on the peripheral area and connecting the first type chip and the second type chip.

Abstract: A chip on film package including a base film, a patterned circuit layer, a chip, an underfill portion, and a water resistant layer. The base film includes a first surface and a second surface opposite to the first surface, and the first surface includes a mounting region. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The underfill portion covers a connecting portion where the chip and the pattern circuit layer are connected. The water resistant layer at least coves an outer surface of the underfill, wherein the material of the water resistant layer includes resin and metal particles.

Abstract: A chip structure including a chip body and a plurality of conductive bumps. The chip body includes an active surface and a plurality of bump pads disposed on the active surface. The conductive bumps are disposed on the active surface of the chip body and connected to the bump pads respectively, and at least one of the conductive bumps has a trapezoid shape having one pair of parallel sides and one pair of non-parallel sides.

Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a reinforcing sheet. The base film includes a first surface, a second surface opposite to the first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The reinforcing sheet is disposed on the first surface and/or the second surface and exposes the chip, wherein a flexibility of the reinforcing sheet is substantially equal to or greater than a flexibility of the base film.

Abstract: A chip on glass package assembly includes a glass substrate, a first type chip, a second type chip and a plurality of connecting lines. The glass substrate includes an active area and a peripheral area connected to the active area. The first type chip is mounted on the peripheral area and including a processor. The second type chip is mounted on the peripheral area and located on a side of the first type chip, wherein the second type chip is different from the first type chip. The connecting lines are disposed on the peripheral area and connecting the first type chip and the second type chip.

Abstract: A chip-on-film device including a flexible circuit film having a wire, a passivation layer having a hole, an adhesive layer, a first pad, a second pad, an interconnection, and a bump is provided. A part of the adhesive layer is disposed in the hole. The first pad and the second pad are disposed under the passivation layer. A part of the interconnection is disposed under the passivation layer, and disposed between the first pad and the second pad. The bump is electrically connected to the first pad via the adhesive layer. The bump is welded on the wire. A part of a first part of the bump overlaps the first pad, a second part of the bump extends to an outside of the pad and at least partially overlaps the interconnection, and the third part of the bump overlaps the second pad.

Abstract: A chip-on-film device including a flexible circuit film having a wire, a passivation layer having a hole, an adhesive layer, a pad, an interconnection, and a bump is provided. A part of the adhesive layer is disposed in the hole. The pad is disposed under the passivation layer, and a part of the pad is disposed under the hole. A part of the interconnection is disposed under the passivation layer, and disposed at a side of the pad, wherein the interconnection does not touch the pad. A part of the bump is disposed on the adhesive layer. The bump is electrically connected to the pad via the adhesive layer. The bump is welded on the wire. A part of a first part of the bump overlaps the pad, and a second part of the bump extends to an outside of the pad and at least partially overlaps the interconnection.