Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes a search circuitry and a substitution check circuitry. The key generation circuitry is arranged operably to convert a first value of one byte corresponding to a plaintext, an intermediate encryption result, or a round key into a second value of a K-bit according to an 8-to-K lookup table, where K is an integer ranging from 10 to 15 and the second value comprises (K minus 8) bits of a Hamming parity. The substitution check circuitry is arranged operably to employ check formulae corresponding to the 8-to-K lookup table to determine whether an error is occurred during a conversion of the first value of the one byte into the second value of the K-bit, and output an error signal when finding the error, where a total amount of the formulae is K minus 8.

Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes an encoding circuitry and an error detection circuitry. The encoding circuitry is arranged operably to realize an encryption algorithm including multiple rounds, in which of each round encodes plaintext or an intermediate encryption result with a round key. The error detection circuitry is arranged operably to: calculate redundant data corresponding to the intermediate encryption result; and output an error signal to a processing unit when finding that the intermediate encryption result does not match the redundant data at a check point during an encryption process.

Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes a key generation circuitry and a key-error detection circuitry. The key generation circuitry is arranged operably to realize a key expansion operation for generating multiple round keys based on a root key in an encryption algorithm, where the encryption algorithm encodes plaintext or an intermediate encryption result with one round key in a corresponding round. The error detection circuitry is arranged operably to: calculate redundant data corresponding to each round key; and output an error signal to a processing unit when finding that any round key does not match corresponding redundant data at a check point during the key expansion operation.

Abstract: A method for performing access control in a memory device, the associated memory device and the controller thereof are provided. The method includes: according to at least one predetermined arrangement pattern, writing a plurality of sets of symbols into a plurality of storage regions of a memory as a plurality of redundant array of independent disks (RAID) groups, respectively; and utilizing a RAID engine circuit in the memory device to perform a plurality of operations related to data protection, such as: determining a series of reading patterns corresponding to the predetermined arrangement pattern; according to a reading pattern of the series of reading patterns, reading a plurality of symbols from each RAID group of the RAID groups; and performing exclusive-OR (XOR) operations on the symbols to convert the symbols into at least one XOR result, for performing data protection.

Abstract: A data accessing method using data protection with aid of an Advanced Encryption Standard (AES) processing circuit, and associated apparatus such as memory device, memory controller, and the AES processing circuit are provided. The data accessing method includes: utilizing the memory controller to start receiving first protected data corresponding to a read request from predetermined storage space; utilizing the AES processing circuit to start performing decryption processing on the first protected data to obtain decrypted data; utilizing the AES processing circuit to start performing encryption processing on other data to obtain encrypted data to be second protected data corresponding to a write request; and utilizing the memory controller to start sending the second protected data to the predetermined storage space, for storing the second protected data into the predetermined storage space. The AES processing circuit can perform encryption and decryption simultaneously.

Abstract: A method for performing access control regarding quality of service (QoS) optimization of a memory device with aid of machine learning an associated apparatus (e.g. the memory device and a controller thereof) are provided. The method may include: performing background scan on the NV memory to collect valley information of voltage distribution of memory cells within the NV memory, and performing machine learning based on a reinforcement learning model according to the valley information, in order to prepare a plurality of tables through the machine learning based on the reinforcement learning model in advance, for use of reading data from the NV memory; during a first time interval, writing first data and read the first data using a first table within the plurality of tables; and during a second time interval, reading the first data using a second table within the plurality of tables.

Abstract: A method for performing access control in a memory device, the associated memory device and the controller thereof are provided. The method includes: according to at least one predetermined arrangement pattern, writing a plurality of sets of symbols into a plurality of storage regions of a memory as a plurality of redundant array of independent disks (RAID) groups, respectively; and utilizing a RAID engine circuit in the memory device to perform a plurality of operations related to data protection, such as: determining a series of reading patterns corresponding to the predetermined arrangement pattern; according to a reading pattern of the series of reading patterns, reading a plurality of symbols from each RAID group of the RAID groups; and performing exclusive-OR (XOR) operations on the symbols to convert the symbols into at least one XOR result, for performing data protection.

Abstract: A method for performing access control in a memory device, the associated memory device and the controller thereof are provided. The method includes: according to at least one predetermined arrangement pattern, writing a plurality of sets of symbols into a plurality of storage regions of a memory as a plurality of redundant array of independent disks (RAID) groups, respectively; and utilizing a RAID engine circuit in the memory device to perform a plurality of operations related to data protection, such as: determining a series of reading patterns corresponding to the predetermined arrangement pattern; according to a reading pattern of the series of reading patterns, reading a plurality of symbols from each RAID group of the RAID groups; and performing exclusive-OR (XOR) operations on the symbols to convert the symbols into at least one XOR result, for performing data protection.

Abstract: A method for performing access control in a memory device, the associated memory device and the controller thereof are provided. The method includes: according to at least one predetermined arrangement pattern, writing a plurality of sets of symbols into a plurality of storage regions of a memory as a plurality of redundant array of independent disks (RAID) groups, respectively; and utilizing a RAID engine circuit in the memory device to perform a plurality of operations related to data protection, such as: determining a series of reading patterns corresponding to the predetermined arrangement pattern; according to a reading pattern of the series of reading patterns, reading a plurality of symbols from each RAID group of the RAID groups; and performing exclusive-OR (XOR) operations on the symbols to convert the symbols into at least one XOR result, for performing data protection.

Abstract: A method and a system for searching for a global minimum are provided. First, a subclass of a plurality of space points in a multidimensional space is clustered into a plurality of clusters through a clustering algorithm, wherein each of the space points is corresponding to an error value in an evaluation function. Then, ellipsoids for enclosing the clusters in the multidimensional space are respectively calculated. Next, a designated space corresponding to each of the ellipsoids is respectively inputted into a recursive search algorithm to search for a local minimum among the error values corresponding to the space points within each designated space. Finally, the local minimums of all the clusters are compared to obtain the space point corresponding to the minimum local minimum.

Abstract: A method and a system for searching for a global minimum are provided. First, a subclass of a plurality of space points in a multidimensional space is clustered into a plurality of clusters through a clustering algorithm, wherein each of the space points is corresponding to an error value in an evaluation function. Then, ellipsoids for enclosing the clusters in the multidimensional space are respectively calculated. Next, a designated space corresponding to each of the ellipsoids is respectively inputted into a recursive search algorithm to search for a local minimum among the error values corresponding to the space points within each designated space. Finally, the local minimums of all the clusters are compared to obtain the space point corresponding to the minimum local minimum.