Abstract: A clock oscillator system for use in providing the switching regulator duty cycle control in a fixed frequency (no cycle skipping) operation is provided. In one embodiment, the circuit according to the invention uses an analog feedback loop to extend the switch ON time of the clock cycle by controlling the oscillator charging current and, thereby, increase the duty cycle. Preferably, this circuit can achieve very high switching duty cycle and/or very low switching duty cycle in a PWM switching regulator operated in very low drop-out operation when very high duty cycle is required or in other conditions when very low duty cycle is required.

Abstract: A slope compensation circuit that provides slope compensation in a switching regulator is provided. The slope compensation circuit preferably is adapted to receive an oscillator pulse train from a pulse width modulator oscillator and a modulator pulse train from a pulse width modulator. The circuit preferably includes a feedback loop that is responsive to the oscillator pulse train. The circuit preferably provides a slope compensation pulse train of ON and OFF states that is responsive in part to the feedback loop and in part to the pulse width modulator switch pulse train. The invention preferably achieves lower maximum slope compensation current by incorporating an analog feedback loop in the PWM system to start slope compensation preferably only slightly ahead of PWM switch-OFF. This preferably occurs independent of the PWM duty cycle.

Abstract: Switching regulator Burst Mode control circuitry is provided for limiting voltage overshoot at the output of a switching regulator operating in power saving Burst Mode. The Burst Mode control circuitry may include regulator load current sensing circuitry which may be operative to put and maintain the regulator in the SLEEP state when the load current amplitude is below a threshold. The control circuitry may also include gated over-voltage comparator circuitry operative to reduce regulator output overshoot and to eliminate erroneous deactivation of the regulator switch circuitry when the regulator is not operating in Burst Mode. The gated over-voltage circuitry may include a one-shot timer circuit.

Abstract: The present invention discloses a backlight control circuit, and a method for controlling light emission devices. The method comprises: providing a plurality of light emission device paths connected in parallel; and setting a total current of the paths connected in parallel to a constant.

Abstract: The present invention discloses a backlight control circuit, comprising: a voltage supply circuit for receiving an input voltage and generating an output voltage under control by a control signal; at least one voltage comparison path respectively coupled to at least one light emission device path; a voltage operative amplifier circuit for generating the control signal according to a lowest voltage on the at least one voltage comparison path; and at least one under current detection circuit for detecting whether a corresponding one of the at least one light emission device path is in an under current status, whereby when anyone of the under current detection circuits detects the under current status, it sends an exclusion signal excluding a corresponding one of the at least one voltage comparison path from being an effective input of the voltage operative amplifier.

Abstract: Compensation for a switching regulator is attained by developing a compensation signal for a switching regulator that is independent of changes in the switching frequency. The regulator operational frequency is established in accordance with a repetitive ramp signal of constant slope and adjustable frequency. The voltage of the ramp signal is monitored and an offset signal is derived therefrom. The peak value of the ramp signal, detected during monitoring, is used to derive the offset signal. Initiation of the compensation occurs at the same duty cycle point during each switching cycle and thus is independent of switching frequency. The compensation signal may have a linear or non-linear slope.

Abstract: An integrated circuit providing high equivalent capacitance ranging from a few tens of picofarads to a few nanofarads is presented. The integrated circuit includes active integrated circuit components, requires no external capacitor, and is substantially insensitive to transistor current gain variations. The high capacitance integrated circuit can be advantageously used to provide, for example, timing delay and servo loop compensation.

Abstract: Switching regulator Burst Mode control circuitry is provided for limiting voltage overshoot at the output of a switching regulator operating in power saving Burst Mode. The Burst Mode control circuitry may include regulator load current sensing circuitry which may be operative to put and maintain the regulator in the SLEEP state when the load current amplitude is below a threshold. The control circuitry may also include gated over-voltage comparator circuitry operative to reduce regulator output overshoot and to eliminate erroneous deactivation of the regulator switch circuitry when the regulator is not operating in Burst Mode. The gated over-voltage circuitry may include a one-shot timer circuit.

Abstract: A slope compensation circuit that provides slope compensation in a switching regulator is provided. The slope compensation circuit preferably is adapted to receive an oscillator pulse train from a pulse width modulator oscillator and a modulator pulse train from a pulse width modulator. The circuit preferably includes a feedback loop that is responsive to the oscillator pulse train. The circuit preferably provides a slope compensation pulse train of ON and OFF states that is responsive in part to the feedback loop and in part to the pulse width modulator switch pulse train. The invention preferably achieves lower maximum slope compensation current by incorporating an analog feedback loop in the PWM system to start slope compensation preferably only slightly ahead of PWM switch-OFF. This preferably occurs independent of the PWM duty cycle.

Abstract: A clock oscillator system for use in providing the switching regulator duty cycle control in a fixed frequency (no cycle skipping) operation is provided. In one embodiment, the circuit according to the invention uses an analog feedback loop to extend the switch ON time of the clock cycle by controlling the oscillator charging current and, thereby, increase the duty cycle. Preferably, this circuit can achieve very high switching duty cycle and/or very low switching duty cycle in a PWM switching regulator operated in very low drop-out operation when very high duty cycle is required or in other conditions when very low duty cycle is required.

Abstract: Compensation for a switching regulator is attained by developing a compensation signal for a switching regulator that is independent of changes in the switching frequency. The regulator operational frequency is established in accordance with a repetitive ramp signal of constant slope and adjustable frequency. The voltage of the ramp signal is monitored and an offset signal is derived therefrom. The peak value of the ramp signal, detected during monitoring, is used to derive the offset signal. Initiation of the compensation occurs at the same duty cycle point during each switching cycle and thus is independent of switching frequency. The compensation signal may have a linear or non-linear slope.

Abstract: Controlled compensation for a switching regulator is attained by detecting switching duty cycle of the switching regulator, developing a compensation signal having a time duration that is related to the detected switching duty cycle percentage, and generating a duty cycle control signal for the regulator that is dependent in part on the developed compensation signal.

Abstract: Output voltage overshoot of a switching regulator is controlled by deactivating switching operation when a signal proportional to the output voltage exceeds a variable threshold level, with the threshold level set as a function of regulator output current. In accordance with an embodiment, a difference signal is generated that corresponds to a difference between an output voltage feedback signal and a constant reference voltage. The generated difference signal is combined with a signal proportional to load current to obtain an adapted threshold level. The adapted threshold level is greater than the level of the constant reference voltage. A regulator switch is reset to an off state when the output voltage feedback signal exceeds the adapted threshold level.

Abstract: Feedback circuits capable of preventing output voltage overshoot in closed-loop DC regulated power supplies are presented. The circuits employ hysteresis at the input of an operational amplifier to improve the response time of the feedback circuits to a rising output voltage reaching a threshold. The feedback circuits substantially reduce, if not prevent, output voltage overshoot during start-up and hard and soft output shorts.

Abstract: Feedback circuits capable of preventing output voltage overshoot in closed-loop DC regulated power supplies are presented. The circuits employ hysteresis at the input of an operational amplifier to improve the response time of the feedback circuits to a rising output voltage reaching a threshold. The feedback circuits substantially reduce, if not prevent, output voltage overshoot during start-up and hard and soft output shorts.

Abstract: Feedback circuits capable of preventing output voltage overshoot in closed-loop DC regulated power supplies are presented. The circuits employ hysteresis at the input of an operational amplifier to improve the response time of the feedback circuits to a rising output voltage reaching a threshold. The feedback circuits substantially reduce, if not prevent, output voltage overshoot during start-up and hard and soft output shorts.