Abstract: In some aspects of the present disclosure, an electrostatic discharge (ESD) protection circuit is disclosed. In some aspects, the ESD protection circuit includes a first transistor coupled to a pad, a second transistor coupled between the first transistor and ground, a stack of transistors coupled to the first transistor, and an ESD clamp coupled between the stack of transistors and the ground.

Abstract: The present invention generally relates to sensitizer compounds and their use in combination with Tyrosine Kinase Inhibitors (TKIs) for sensitizing tumor, cancer or pre-cancerous cells to TKI treatment. In particular, the present invention relates to administration regimes that combine TKIs such as Gefitinib or Icotinib with TKI-sensitizing DZ1 esters and amides conjugated to statin or platin-based drugs, or to Artemisinin, including, without limitation: DZ1-Simvastatin amide, DZ1-Simvastatin ester, DZ1-Cisplatin ester, and DZ1-Cisplatin amide, DZ1-Artemisinin ester, and DZ1-Artemisinin amide. Furthermore, the present invention relates to improved TKI treatment of cancers by sensitizing tumor, cancer or pre-cancerous cells, in particular cancers that develop TKI resistance, including e.g. lung cancer and pancreatic cancer.

Abstract: A method of manufacturing a semiconductor memory device is provided in the present invention, including steps of providing a substrate, forming word lines extending in a first direction in said substrate, forming bit lines extending in a second direction over said word lines, forming partition structures between said bit lines and right above said word lines, forming storage node contacts in spaces defined by said bit lines and said partition structures, wherein a portion of said storage node contact protruding from top surfaces of said bit lines and said partition structures is contact pad, forming a silicon nitride liner on said contact pads, said bit lines and said partition structures, and forming a silicon oxide layer on said silicon nitride liner.

Abstract: The invention provides a memory and a forming method thereof. By connecting two node contact parts filled in two node contact windows at the edge and adjacent to each other, a large-sized combined contact can be formed, so that when preparing the node contact parts, the morphology of the combined contact at the edge position can be effectively ensured, and under the blocking protection of the combined contact with a large width, the rest of the node contact parts can be prevented from being greatly eroded, and the morphology accuracy of the independently arranged node contact parts can be improved, thereby being beneficial to improving the device performance of the formed memory.

Abstract: A semiconductor memory device is provided in the present invention, including a substrate, word lines in the substrate, bit lines over the word lines, partition structures between the bit lines and right above the word lines, storage node contacts in spaces defined by the bit lines and the partition structures and electrically connecting with the substrate, wherein a portion of the storage node contact protruding from top surfaces of the bit lines and the partition structures is contact pad, and contact pad isolation structures on the partition structures and between the contact pads, wherein the contact pad isolation structure includes outer silicon nitride layers and inner silicon oxide layers.

Abstract: The invention provides a memory and a forming method thereof. By connecting two node contact parts filled in two node contact windows at the edge and adjacent to each other, a large-sized combined contact can be formed, so that when preparing the node contact parts, the morphology of the combined contact at the edge position can be effectively ensured, and under the blocking protection of the combined contact with a large width, the rest of the node contact parts can be prevented from being greatly eroded, and the morphology accuracy of the independently arranged node contact parts can be improved, thereby being beneficial to improving the device performance of the formed memory.

Abstract: Provided are an electrical contact structure. Through enabling at least the first contact plug closest to a peripheral area to be formed above an isolation structure of a boundary area between a core area and the peripheral area and in contact with the isolation structure, and enabling a bottom portion of the first contact plug to be completely overlapped on the isolation structure, or, enabling a part of the bottom portion to be overlapped with the isolation structure, enabling the other part of the bottom portion to be overlapped with an active area (AA) of the core area next to the isolation structure, and even enabling a top portion of the first contact plug to be at least connected with a top portion of the contact plug above the AA of the core area next to the isolation structure.

Abstract: A transistor, a memory and a method of forming the same are disclosed. The transistor includes a gate dielectric layer (200) having an upper portion (200b) and a lower portion (200a). The upper portion (200b) is multi-layer structure having an increased thickness without changing a thickness of the lower portion (200a). In this way, gate-induced drain current leakage of the transistor can be mitigated at uncompromised performance thereof. Additionally, the upper portion (200b) designed as multi-layer structure having an increased thickness can facilitate flexible adjustment in parameters of the upper portion (200b). The memory device includes dielectric material layers (DL), which are formed in respective word line trenches and each have an upper portion and a lower portion. In addition, in both trench isolation structures (STI) and active areas (AA), the upper portion of the dielectric material layers (DL) has a thickness greater than a thickness of the lower portion.

Abstract: A semiconductor memory device is provided in the present invention, including a substrate, word lines in the substrate, bit lines over the word lines, partition structures between the bit lines and right above the word lines, storage node contacts in spaces defined by the bit lines and the partition structures and electrically connecting with the substrate, wherein a portion of the storage node contact protruding from top surfaces of the bit lines and the partition structures is contact pad, and contact pad isolation structures on the partition structures and between the contact pads, wherein the contact pad isolation structure includes outer silicon nitride layers and inner silicon oxide layers.

Abstract: The invention provides a memory and a forming method thereof. By connecting two node contact parts filled in two node contact windows at the edge and adjacent to each other, a large-sized combined contact can be formed, so that when preparing the node contact parts, the morphology of the combined contact at the edge position can be effectively ensured, and under the blocking protection of the combined contact with a large width, the rest of the node contact parts can be prevented from being greatly eroded, and the morphology accuracy of the independently arranged node contact parts can be improved, thereby being beneficial to improving the device performance of the formed memory.

Abstract: A circuit for touch sensing includes a driving unit, a self-capacitive sensor circuit, a mutual-capacitive sensor circuit and a control circuit. The driving is configured to generate a driving signal. The self-capacitive sensor circuit is configured to generate a self-capacitance sensing result. The mutual-capacitive sensor circuit is configured to receive the driving signal in order to generate a mutual-capacitance sensing result when the voltage of a node between the self-capacitive sensor circuit and the mutual-capacitive sensor circuit reaches a reference voltage. The control circuit receives and computes the self-capacitance sensing result and the mutual-capacitance sensing result in order to generate a sensing result. By utilizing the circuit for touch sensing of present disclosure, the accuracy and the efficiency of touch sensing can be enhanced.

Abstract: An active stylus pen comprises a touch component and a pressure sensing module. One end of the touch component is disposed at a nib part of the active stylus pen, wherein the touch component is configured to receive an external pressure. The pressure sensing module is connected to the touch component, wherein the pressure sensing module is configured to generate an oscillation signal, wherein the oscillation signal has a first frequency when the touch component receives the external pressure and the external pressure reaches a first threshold value, and wherein the oscillation signal is adjusted to have a second frequency when the touch component receives the external pressure and the external pressure does not reach the first threshold value; wherein a difference of the first frequency and the second frequency is larger than a second threshold value.

Abstract: A circuit for touch sensing includes a driving unit, a self-capacitive sensor circuit, a mutual-capacitive sensor circuit and a control circuit. The driving is configured to generate a driving signal. The self-capacitive sensor circuit is configured to generate a self-capacitance sensing result. The mutual-capacitive sensor circuit is configured to receive the driving signal in order to generate a mutual-capacitance sensing result when the voltage of a node between the self-capacitive sensor circuit and the mutual-capacitive sensor circuit reaches a reference voltage. The control circuit receives and computes the self-capacitance sensing result and the mutual-capacitance sensing result in order to generate a sensing result. By utilizing the circuit for touch sensing of present disclosure, the accuracy and the efficiency of touch sensing can be enhanced.

Abstract: An active stylus pen comprises a touch component and a pressure sensing module. One end of the touch component is disposed at a nib part of the active stylus pen, wherein the touch component is configured to receive an external pressure. The pressure sensing module is connected to the touch component, wherein the pressure sensing module is configured to generate an oscillation signal, wherein the oscillation signal has a first frequency when the touch component receives the external pressure and the external pressure reaches a first threshold value, and wherein the oscillation signal is adjusted to have a second frequency when the touch component receives the external pressure and the external pressure does not reach the first threshold value; wherein a difference of the first frequency and the second frequency is larger than a second threshold value.

Abstract: A dual-mode touch sensing method adapted for a stylus and a touch panel comprising N first signal lines and M second signal lines. The method comprises: sequentially controlling the N first signal lines to emit N corresponding pulse signals in N gesture periods in a scanning period, receiving M gesture feedback signals corresponding to the pulse signals via the M second signal lines in each among the N gesture periods, selectively generating a gesture signal based on the gesture feedback signals, determining a stylus period other than the N gesture periods in the scanning period by the stylus, generating a stylus signal in the stylus period by the stylus, and receiving the stylus signal and generating a stylus touching signal accordingly by the touch panel.

Abstract: A capacitive touch device and a sensing method thereof are disclosed. The capacitive touch device includes a touch panel, at least one touch detection unit and a processing unit. The touch detection unit scans the touch panel, obtains an N-bit sensed data and compresses the N-bit sensed data to an L-bit sensed data. The processing unit receives the L-bit sensed data, decompresses the L-bit sensed data to the N-bit sensed data and calculates a coordinate of a touch according to the N-bit sensed data. The present invention is capable of decreasing the time for transmitting the sensed data, the power consumption and the requirements for the memory capacity of the touch detection unit and the memory capacity of the processing unit.

Abstract: A capacitive touch device and a sensing method thereof are disclosed. The capacitive touch device includes a touch panel and a plurality of touch detection units. The touch panel includes first sensing lines and second sensing lines. The position of a touch between a last one of the first sensing lines and a first one of the second sensing lines is calculated according to sensed values respectively corresponding to a first sensing line prior to the last one of the first sensing lines, the last one of the first sensing lines and the first one of the second sensing lines. The present invention is capable of avoiding the problem that the frame rate is reduced significantly because of the data transmission between the first and second touch detection units.

Abstract: A capacitive touch device and a sensing method thereof are disclosed. The capacitive touch device includes a touch panel, at least one touch detection unit and a processing unit. The touch detection unit scans the touch panel, obtains an N-bit sensed data and compresses the N-bit sensed data to an L-bit sensed data. The processing unit receives the L-bit sensed data, decompresses the L-bit sensed data to the N-bit sensed data and calculates a coordinate of a touch according to the N-bit sensed data. The present invention is capable of decreasing the time for transmitting the sensed data, the power consumption and the requirements for the memory capacity of the touch detection unit and the memory capacity of the processing unit.

Abstract: A capacitive touch device and a sensing method thereof are disclosed. The capacitive touch device includes a touch panel and a plurality of touch detection units. The touch panel includes first sensing lines and second sensing lines. The position of a touch between a last one of the first sensing lines and a first one of the second sensing lines is calculated according to sensed values respectively corresponding to a first sensing line prior to the last one of the first sensing lines, the last one of the first sensing lines and the first one of the second sensing lines. The present invention is capable of avoiding the problem that the frame rate is reduced significantly because of the data transmission between the first and second touch detection units.

Abstract: An automatic self-calibrated oscillation method and an apparatus using the same are provided. After a static time tuning (STT) table and a run time tuning (RTT) table have been established, the apparatus converts an output clock signal to generate a current RTT value at every predefined time and then compares the current RTT value with a reference RTT value generated in response to a STT value of the STT table, or with an interpolated result generated in response to the reference RTT value to generate a deviation value. Thus, through the deviation value, the output clock signal may be calibrated to address the target frequency without the assistance of external reference clock unit or locked loop unit after the STT table and the RTT table are established.