Patents by Inventor Chie-Chien Chang

Chie-Chien Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8557669
    Abstract: MOSFETs having localized stressors are provided. The MOSFET has a stress-inducing layer formed in the source/drain regions, wherein the stress-inducing layer comprises a first semiconductor material and a second semiconductor material. A treatment is performed on the stress-inducing layer such that a reaction is caused with the first semiconductor material and the second semiconductor material is forced lower into the stress-inducing layer. The stress-inducing layer may be either a recessed region or non-recessed region. A first method involves forming a stress-inducing layer, such as SiGe, in the source/drain regions and performing a nitridation or oxidation process. A nitride or oxide film is formed in the top portion of the stress-inducing layer, forcing the Ge lower into the stress-inducing layer. Another method embodiment involves forming a reaction layer over the stress-inducing layer and performing a treatment process to cause the reaction layer to react with the stress-inducing layer.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: October 15, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hao Chen, Pang-Yen Tsai, Chie-Chien Chang, Tze-Liang Lee, Shih-Chang Chen
  • Publication number: 20100015814
    Abstract: MOSFETs having localized stressors are provided. The MOSFET has a stress-inducing layer formed in the source/drain regions, wherein the stress-inducing layer comprises a first semiconductor material and a second semiconductor material. A treatment is performed on the stress-inducing layer such that a reaction is caused with the first semiconductor material and the second semiconductor material is forced lower into the stress-inducing layer. The stress-inducing layer may be either a recessed region or non-recessed region. A first method involves forming a stress-inducing layer, such as SiGe, in the source/drain regions and performing a nitridation or oxidation process. A nitride or oxide film is formed in the top portion of the stress-inducing layer, forcing the Ge lower into the stress-inducing layer. Another method embodiment involves forming a reaction layer over the stress-inducing layer and performing a treatment process to cause the reaction layer to react with the stress-inducing layer.
    Type: Application
    Filed: July 21, 2008
    Publication date: January 21, 2010
    Inventors: Chien-Hao Chen, Pang-Yen Tsai, Chie-Chien Chang, Tze-Liang Lee, Shih-Chang Chen
  • Publication number: 20060151808
    Abstract: MOSFETs having localized stressors are provided. The MOSFET has a stress-inducing layer formed in the source/drain regions, wherein the stress-inducing layer comprises a first semiconductor material and a second semiconductor material. A treatment is performed on the stress-inducing layer such that a reaction is caused with the first semiconductor material and the second semiconductor material is forced lower into the stress-inducing layer. The stress-inducing layer may be either a recessed region or non-recessed region. A first method involves forming a stress-inducing layer, such as SiGe, in the source/drain regions and performing a nitridation or oxidation process. A nitride or oxide film is formed in the top portion of the stress-inducing layer, forcing the Ge lower into the stress-inducing layer. Another method embodiment involves forming a reaction layer over the stress-inducing layer and performing a treatment process to cause the reaction layer to react with the stress-inducing layer.
    Type: Application
    Filed: January 12, 2005
    Publication date: July 13, 2006
    Inventors: Chien-Hao Chen, Pang-Yen Tsai, Chie-Chien Chang, Tze-Liang Lee, Shih-Chang Chen
  • Publication number: 20060088966
    Abstract: Provided are a semiconductor device and a method for manufacturing such a device by varying the pressure used to form silicon-germanium (SiGe) layers on a substrate such that a first layer is formed at a substantially higher pressure than a second layer that is formed on the first layer.
    Type: Application
    Filed: October 21, 2004
    Publication date: April 27, 2006
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pang-Yen Tsai, Chie-Chien Chang, Tze-Liang Lee, Shih-Chang Chen