Abstract: A semiconductor device includes: a semiconductor layer that includes principal surfaces; a metal layer that includes principal surfaces, is disposed with the principal surface in contact with the principal surface, is thicker than the semiconductor layer, and comprises a first metal material; a metal layer that includes principal surfaces, is disposed with the principal surface in contact with the principal surface, and comprises a metal material having a Young's modulus greater than that of the first metal material; and transistors. The transistor includes a source electrode and a gate electrode on a side facing the principal surface. The transistor includes a source electrode and a gate electrode on a side facing the principal surface.

Abstract: A semiconductor device includes: a semiconductor layer that includes principal surfaces; a metal layer that includes principal surfaces, is disposed with the principal surface in contact with the principal surface, is thicker than the semiconductor layer, and comprises a first metal material; a metal layer that includes principal surfaces, is disposed with the principal surface in contact with the principal surface, and comprises a metal material having a Young's modulus greater than that of the first metal material; and transistors. The transistor includes a source electrode and a gate electrode on a side facing the principal surface. The transistor includes a source electrode and a gate electrode on a side facing the principal surface.

Abstract: A semiconductor device includes: a semiconductor layer that includes principal surfaces; a metal layer that includes principal surfaces, is disposed with the principal surface in contact with the principal surface, is thicker than the semiconductor layer, and comprises a first metal material; a metal layer that includes principal surfaces, is disposed with the principal surface in contact with the principal surface, and comprises a metal material having a Young's modulus greater than that of the first metal material; and transistors. The transistor includes a source electrode and a gate electrode on a side facing the principal surface. The transistor includes a source electrode and a gate electrode on a side facing the principal surface.

Abstract: A semiconductor device includes: a semiconductor layer that includes principal surfaces; a metal layer that includes principal surfaces, is disposed with the principal surface in contact with the principal surface, is thicker than the semiconductor layer, and comprises a first metal material; a metal layer that includes principal surfaces, is disposed with the principal surface in contact with the principal surface, and comprises a metal material having a Young's modulus greater than that of the first metal material; and transistors. The transistor includes a source electrode and a gate electrode on a side facing the principal surface. The transistor includes a source electrode and a gate electrode on a side facing the principal surface.

Abstract: Terminals (2b, 2c) are divided into two along a common boundary, coatings (10, 11) most suitable for two conductive bonding materials (5, 6) to be used are exposed on the terminals (2b, 2c), the most suitable one of the coatings (10, 11) is selected, and the corresponding conductive bonding material (5, 6) is bonded onto the coating. Thus it is possible to improve the reliability of bonding and easily reduce a bonding resistance while suppressing a decrease in the reliability of a semiconductor element 3.

Abstract: By increasing the area of a source electrode 3a of a semiconductor element 3 and the area of a source terminal 2b of a lead frame 2, it is possible to extend a joint 8a of the source electrode 3a bonded to a conductive ribbon 6 and a joint 8b of the source terminal 2b. Thus it is possible to reduce an on resistance and easily reduce the number of times a bonding tool comes into contact with the joints to reduce a stress on the semiconductor element 3.

Abstract: Retaining regions 310a and 310b are added to a pad shaped portion 303a of leads and a die pad 302 that are electrically connected via a conductive ribbon 309, so that during the bonding of the ribbon, strong ultrasonic waves can be applied in a state in which the retaining regions 310a and 310b are pressed and fixed. It is therefore possible to reduce a resistance at a joint while firmly bonding the conductive ribbon 309. Further, the bonding strength of the conductive ribbon 309 increases and thus it is possible to eliminate the need for stacking the conductive ribbons 309 and easily reduce a stress caused by ultrasonic waves on a semiconductor chip 306.

Abstract: Retaining regions 310a and 310b are added to a pad shaped portion 303a of leads and a die pad 302 that are electrically connected via a conductive ribbon 309, so that during the bonding of the ribbon, strong ultrasonic waves can be applied in a state in which the retaining regions 310a and 310b are pressed and fixed. It is therefore possible to reduce a resistance at a joint while firmly bonding the conductive ribbon 309. Further, the bonding strength of the conductive ribbon 309 increases and thus it is possible to eliminate the need for stacking the conductive ribbons 309 and easily reduce a stress caused by ultrasonic waves on a semiconductor chip 306.

Abstract: Protrusions 310 are provided on the back side of a lead frame 301. During ultrasonic bonding, the lead frame 301 is placed on a stage and the protrusions 310 are brought into contact with or inserted into the stage, so that the lead frame 301 can be firmly retained on the stage.

Abstract: By increasing the area of a source electrode 3a of a semiconductor element 3 and the area of a source terminal 2b of a lead frame 2, it is possible to extend a joint 8a of the source electrode 3a bonded to a conductive ribbon 6 and a joint 8b of the source terminal 2b. Thus it is possible to reduce an on resistance and easily reduce the number of times a bonding tool comes into contact with the joints to reduce a stress on the semiconductor element 3.

Abstract: Terminals (2b, 2c) are divided into two along a common boundary, coatings (10, 11) most suitable for two conductive bonding materials (5, 6) to be used are exposed on the terminals (2b, 2c), the most suitable one of the coatings (10, 11) is selected, and the corresponding conductive bonding material (5, 6) is bonded onto the coating. Thus it is possible to improve the reliability of bonding and easily reduce a bonding resistance while suppressing a decrease in the reliability of a semiconductor element 3.