Patents by Inventor Chie IINO

Chie IINO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10128131
    Abstract: A sealing sheet with separators on both surfaces is provided with a sealing sheet, a separator (A) stacked on one surface of the sealing sheet and having a thickness of 50 ?m or more, and a separator (B) stacked on the other surface of the sealing sheet.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: November 13, 2018
    Assignee: NITTO DENKO CORPORATION
    Inventors: Goji Shiga, Tsuyoshi Ishizaka, Kosuke Morita, Chie Iino
  • Publication number: 20180304603
    Abstract: Provided is a bump base reinforcement sheet which can reinforce a base portion of even a solder bump having a large diameter on a primary mounted substrate side and achieve good electrical connection with a secondary mounted substrate. A bump base reinforcement sheet includes: a base material sheet; and a thermosetting resin sheet laminated on the base material sheet, in which a thickness t [?m] of the base material sheet and a minimum melt viscosity ? [Pa·s] of the thermosetting resin sheet at 50 to 180° C. satisfy the following relational expression: 150?t·??100000.
    Type: Application
    Filed: October 13, 2016
    Publication date: October 25, 2018
    Inventors: Chie Iino, Goji Shiga
  • Patent number: 10074582
    Abstract: Provided is a sealing sheet capable of preventing void and filler segregation from occurring when forming a sealing body in which semiconductor chips are buried in the sealing sheet. The sealing sheet has a viscosity within the range of 1 Pa·s to 50000 Pa·s at 90° C.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: September 11, 2018
    Assignee: NITTO DENKO CORPORATION
    Inventors: Jun Ishii, Goji Shiga, Chie Iino
  • Publication number: 20170287800
    Abstract: Provided is a sealing sheet capable of preventing void and filler segregation from occurring when forming a sealing body in which semiconductor chips are buried in the sealing sheet. The sealing sheet has a viscosity within the range of 1 Pa·s to 50000 Pa·s at 90° C.
    Type: Application
    Filed: August 21, 2015
    Publication date: October 5, 2017
    Inventors: Jun Ishii, Goji Shiga, Chie Iino
  • Publication number: 20170278716
    Abstract: In order to provide a sealing sheet capable of preventing same from falling off a suction collet during conveyancing, etc., and whereby semiconductor chips can be suitably buried, the sum ? of a thickness t [mm] and a storage elastic modulus G? [Pa] at 50° C., for this sealing sheet, fulfils 300???1.5×105.
    Type: Application
    Filed: August 6, 2015
    Publication date: September 28, 2017
    Inventors: Chie Iino, Goji Shiga, Jun Ishii
  • Patent number: 9754894
    Abstract: Provided is a thermosetting sheet for sealing which is used to seal an electronic device. One surface of the sheet has a surface roughness (Ra) of 3 ?m or less before the sheet is cured.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: September 5, 2017
    Assignee: NITTO DENKO CORPORATION
    Inventors: Chie Iino, Takeshi Matsumura, Goji Shiga, Kosuke Morita
  • Patent number: 9659883
    Abstract: The present invention provides a thermally curable resin sheet for sealing a semiconductor chip having excellent reliability and storability while being reduced in warpage deformation due to the volume shrinkage of the thermally curable resin sheet, and a method for manufacturing a semiconductor package. The present invention relates to a thermally curable resin sheet for sealing a semiconductor chip, wherein an activation energy (Ea) satisfies the following formula (1), a glass transition temperature of a product thermally cured at 150° C. for 1 hour is 125° C. or higher, and a thermal expansion coefficient ? [ppm/K] of the thermally cured product at the glass transition temperature or lower and a storage modulus E? [GPa] at 25° C. of the thermally cured product satisfy the following formula (2): 30?Ea?120 [kJ/mol]??(1); and 10,000??×E??300,000 [Pa/K]??(2).
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: May 23, 2017
    Assignee: NITTO DENKO CORPORATION
    Inventors: Kosuke Morita, Tsuyoshi Ishizaka, Eiji Toyoda, Goji Shiga, Chie Iino, Jun Ishii
  • Publication number: 20170125373
    Abstract: Provided is a method for producing a semiconductor package. By this method, a periphery of a light-exposure planning region can be prevented from being exposed to light. The method is a semiconductor package producing method in which a film-formation planning surface of a cured product has a surface roughness of a predetermined value or less.
    Type: Application
    Filed: December 22, 2014
    Publication date: May 4, 2017
    Inventors: Kosuke Morita, Tsuyoshi Ishizaka, Jun Ishii, Goji Shiga, Chie Iino
  • Publication number: 20170040187
    Abstract: A sealing sheet with a double-sided separator, provided with a sealing sheet, a separator (A) laminated on one side of the sealing sheet, and a separator (B) laminated on the other side of the sealing sheet, the separation force F1 between the sealing sheet and the separator (A), the separation force F2 between the sealing sheet and the separator (B), the thickness t of the sealing sheet, and the area A of the sealing sheet satisfying a specific relationship.
    Type: Application
    Filed: December 22, 2014
    Publication date: February 9, 2017
    Inventors: Chie Iino, Tsuyoshi Ishizaka, Kosuke Morita, Goji Shiga
  • Publication number: 20170040287
    Abstract: The electronic component device production method includes a step A of preparing a layered body comprising electronic components immobilized on a support body, a step B of preparing an electronic component sealing sheet, a step C of disposing the electronic component sealing sheet over the electronic components under conditions where the probe tack force of the electronic component sealing sheet is 5 gf or lower according to a probe tack test, a step D of rising the temperature of the electronic component sealing sheet until the probe tack of the electronic component sealing sheet is 10 gf or greater according to the probe tack test to immobilize temporarily the electronic component sealing sheet onto the electronic components, and a step E of embedding the electronic components in the electronic component sealing sheet to form a sealed body comprising the electronic components embedded in the electronic component sealing sheet.
    Type: Application
    Filed: December 22, 2014
    Publication date: February 9, 2017
    Inventors: Goji Shiga, Tsuyoshi Ishizaka, Kosuke Morita, Chie Iino
  • Publication number: 20170033076
    Abstract: Provided is a production method for a semiconductor package making it possible to embed, in its irregularities, a thermosetting resin sheet satisfactorily. The method is a production method, for a semiconductor package, including the step of forming a sealed body by pressurizing a stacked body which includes: a chip-temporarily-fixed body comprising a supporting plate, a temporarily-fixing material stacked over the supporting plate, and a semiconductor chip fixed temporarily over the temporarily-fixing material; a thermosetting resin sheet arranged over the chip-temporarily-fixed body; and a separator having a tensile storage elastic modulus of 200 MPa or less at 90° C. and arranged over the thermosetting resin sheet; the sealed body including the semiconductor chip and the thermosetting resin sheet covering the semiconductor chip.
    Type: Application
    Filed: December 22, 2014
    Publication date: February 2, 2017
    Inventors: Kosuke Morita, Tsuyoshi Ishizaka, Jun Ishii, Goji Shiga, Chie Iino
  • Publication number: 20170032979
    Abstract: Provided is a production method for a semiconductor package which can yield a sealed resin body excellent in surface smoothness, and which makes it possible to omit any step of grinding a resin region of the sealed resin body. This method is a production method, for a semiconductor package, including the step of pressurizing a stacked body which includes: a chip-temporarily-fixed body comprising a supporting plate, a temporarily-fixing material stacked over the supporting plate, and a semiconductor chip fixed temporarily over the temporarily-fixing material; a thermosetting resin sheet arranged over the chip-temporarily-fixed body; and a separator having a tensile storage elastic modulus of 200 MPa or more at 90° C. and arranged over the thermosetting resin sheet. In this way, a sealed body is formed which includes the semiconductor chip and the thermosetting resin sheet covering the semiconductor chip.
    Type: Application
    Filed: December 22, 2014
    Publication date: February 2, 2017
    Inventors: Kosuke Morita, Tsuyoshi Ishizaka, Jun Ishii, Goji Shiga, Chie Iino
  • Publication number: 20160300733
    Abstract: A sealing sheet with separators on both surfaces is provided with a sealing sheet, a separator (A) stacked on one surface of the sealing sheet and having a thickness of 50 ?m or more, and a separator (B) stacked on the other surface of the sealing sheet.
    Type: Application
    Filed: October 31, 2014
    Publication date: October 13, 2016
    Applicant: Nitto Denko Corporation
    Inventors: Goji Shiga, Tsuyoshi Ishizaka, Kosuke Morita, Chie Iino
  • Publication number: 20160211217
    Abstract: Provided is a thermosetting sheet for sealing which is used to seal an electronic device. One surface of the sheet has a surface roughness (Ra) of 3 ?m or less before the sheet is cured.
    Type: Application
    Filed: June 30, 2014
    Publication date: July 21, 2016
    Inventors: Chie IINO, Takeshi MATSUMURA, Goji SHIGA, Kosuke MORITA
  • Publication number: 20160211228
    Abstract: The present invention provides a thermally curable resin sheet for sealing a semiconductor chip having excellent reliability and storability while being reduced in warpage deformation due to the volume shrinkage of the thermally curable resin sheet, and a method for manufacturing a semiconductor package. The present invention relates to a thermally curable resin sheet for sealing a semiconductor chip, wherein an activation energy (Ea) satisfies the following formula (1), a glass transition temperature of a product thermally cured at 150° C. for 1 hour is 125° C. or higher, and a thermal expansion coefficient ? [ppm/K] of the thermally cured product at the glass transition temperature or lower and a storage modulus E? [GPa] at 25° C. of the thermally cured product satisfy the following formula (2): 30?Ea?120 [kJ/mol]??(1); and 10,000??×E??300,000 [Pa/K]??(2).
    Type: Application
    Filed: September 9, 2014
    Publication date: July 21, 2016
    Inventors: Kosuke Morita, Tsuyoshi Ishizaka, Eiji Toyoda, Goji Shiga, Chie Iino, Jun Ishii