Patents by Inventor Chie KOYAMA

Chie KOYAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240040700
    Abstract: A semiconductor storage device according to an embodiment includes a board, a first semiconductor memory, a second semiconductor memory, a controller, and a wiring. The first semiconductor memory includes a first bonding member. The first semiconductor memory has a first corner, a second corner, a third corner, and a fourth corner. The second semiconductor memory includes a second bonding member. The second semiconductor memory has a fifth corner, a sixth corner, a seventh corner, and an eighth corner. The first bonding member is a first detection-bonding member. The first detection-bonding member detects a connection state of the first semiconductor memory and the second semiconductor memory. The second bonding member is a second detection-bonding member. The second detection-bonding member is electrically connected to the first detection-bonding member. The second detection-bonding member detects a connection state of the first semiconductor memory and the second semiconductor memory.
    Type: Application
    Filed: March 13, 2023
    Publication date: February 1, 2024
    Applicant: Kioxia Corporation
    Inventors: Chie KOYAMA, Kengo KUMAGAI
  • Publication number: 20130181349
    Abstract: According to an embodiment, a semiconductor device includes a first circuit block, a first through-substrate via, and a back surface wiring. The first circuit block is provided on a surface side of a semiconductor substrate. The first through-substrate via is provided along a circumference of the first circuit block so as to separate the first circuit block from other circuit blocks. The first circuit block is provided so as to penetrate the surface of the semiconductor substrate. The first circuit block is isolated from the surroundings. The first circuit block has conductivity. The back surface wiring is provided on the back surface side of the semiconductor substrate. The back surface wiring is connected to the first through-substrate via. The back surface wiring connects the first through-substrate via to a power supply terminal or a shield potential terminal.
    Type: Application
    Filed: August 30, 2012
    Publication date: July 18, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Chie KOYAMA, Satoyuki Miyako, Eiji Sato