Abstract: A data transfer apparatus comprises a plurality of selectors each having two inputs and an output, and a transfer gate gating the transfer of data, wherein one inputs of the plurality of selectors are connected to respective bits of a data bus in the order that transfer bits are arranged, while the other inputs thereof are connected to the outputs of the other selectors in the order, the transfer gate is connected to the output of the final-stage selector of the plurality of selectors, data of the respective corresponding bits of the data bus is set in the respective plurality of selectors when a transmission enable signal is in a negated state, and when the transmission enable signal is arranged to be in an asserted state, the plurality of selectors and the transfer gate are connected so as to serially transfer the data, and the set data is serially transferred in the connecting state by means of a delayed action resulting from an inter-selector delay time.

Abstract: A data transfer apparatus comprises a plurality of selectors each having two inputs and an output, and a transfer gate gating the transfer of data, wherein one inputs of the plurality of selectors are connected to respective bits of a data bus in the order that transfer bits are arranged, while the other inputs thereof are connected to the outputs of the other selectors in the order, the transfer gate is connected to the output of the final-stage selector of the plurality of selectors, data of the respective corresponding bits of the data bus is set in the respective plurality of selectors when a transmission enable signal is in a negated state, and when the transmission enable signal is arranged to be in an asserted state, the plurality of selectors and the transfer gate are connected so as to serially transfer the data, and the set data is serially transferred in the connecting state by means of a delayed action resulting from an inter-selector delay time.