Patents by Inventor Chie Yamanaka

Chie Yamanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5278012
    Abstract: A method for producing a thin film multilayer substrate having a base substrate, and, which a plurality of conductor pattern layers superposed thereon through dielectric layers therebetween comprises the steps of: optically detecting the uppermost conductor pattern layer whenever the conductor pattern layer is formed on the base substrate; inspecting an absence and/or presence of a fault of the conductor pattern layer; and repairing a faulty portion in accordance with fault position data detected by the inspecting. According to this method, it is possible to enhance a production yield of relatively large size of thin film multilayer substrates which needs a relatively small amount of production at a high production cost, for mounting LSI chips thereon.
    Type: Grant
    Filed: September 2, 1992
    Date of Patent: January 11, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Chie Yamanaka, Toshiaki Ichinose, Takanori Ninomiya, Hisafumi Iwata, Yasuo Nakagawa, Nobuyuki Akiyama