Abstract: A chip package includes a semiconductor structure and a redistribution layer. The semiconductor structure has a substrate, a first isolation layer, and a lower ground pad. The substrate has a top surface, a bottom surface opposite to the top surface, a through hole through the top surface and the bottom surface, and a sidewall surrounding the through hole. The first isolation layer is located on the top surface of the substrate, and the lower ground pad is located in the through hole. The redistribution layer extends from the bottom surface of the substrate to the lower ground pad along the sidewall. The redistribution layer covers the entire bottom surface of the substrate and electrically connects the lower ground pad.

Abstract: A chip package includes a semiconductor structure and a redistribution layer. The semiconductor structure has a substrate, a first isolation layer, and a lower ground pad. The substrate has a top surface, a bottom surface opposite to the top surface, a through hole through the top surface and the bottom surface, and a sidewall surrounding the through hole. The first isolation layer is located on the top surface of the substrate, and the lower ground pad is located in the through hole. The redistribution layer extends from the bottom surface of the substrate to the lower ground pad along the sidewall. The redistribution layer covers the entire bottom surface of the substrate and electrically connects the lower ground pad.