Patents by Inventor Chieh-Chih Chou

Chieh-Chih Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Schottky barrier diode
    Patent number: 9887302
    Abstract: A Schottky barrier diode is provided, which includes a semiconductor substrate, a first well region, an isolation region, a silicide layer and a silicon oxide-containing layer. The first well region of a first conductivity type is in the semiconductor substrate. The isolation region is in the first well region. The silicide layer is laterally adjacent to the isolation region, and over and in contact with the first well region. The silicon oxide-containing layer is over and in contact with the isolation region.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: February 6, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han Lin, Chieh-Chih Chou, Chih-Wen Hsiung, Kong-Beng Thei
  • SCHOTTKY BARRIER DIODE
    Publication number: 20170054037
    Abstract: A Schottky barrier diode is provided, which includes a semiconductor substrate, a first well region, an isolation region, a silicide layer and a silicon oxide-containing layer. The first well region of a first conductivity type is in the semiconductor substrate. The isolation region is in the first well region. The silicide layer is laterally adjacent to the isolation region, and over and in contact with the first well region. The silicon oxide-containing layer is over and in contact with the isolation region.
    Type: Application
    Filed: November 8, 2016
    Publication date: February 23, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han LIN, Chieh-Chih CHOU, Chih-Wen HSIUNG, Kong-Beng THEI
  • Low stress integrated circuit fusible link
    Patent number: 6734525
    Abstract: A fuse structure and method for fabricating same are disclosed. The fuse structure is designed for opening by conventional laser energy application. The fuse structure is characterized by an absence of high stress areas in the surrounding substrate thereby resulting in higher fabrication yields due to lower occurrence of substrate fracturing or other damage occasioned by the opening of the fuse.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: May 11, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Chieh-Chih Chou, Jiun-Pyng You, Yu-Ching Chang
  • Low stress integrated circuit fusible link
    Publication number: 20030209777
    Abstract: A fuse structure and method for fabricating same are disclosed. The fuse structure is designed for opening by conventional laser energy application. The fuse structure is characterized by an absence of high stress areas in the surrounding substrate thereby resulting in higher fabrication yields due to lower occurrence of substrate fracturing or other damage occasioned by the opening of the fuse.
    Type: Application
    Filed: May 13, 2002
    Publication date: November 13, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chieh-Chih Chou, Jiun-Pyng You, Yu-Ching Chang