Patents by Inventor Chieh Chih Ting

Chieh Chih Ting has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR PRODUCT WITH LOW-LEAKAGE CURRENT AND METHOD FOR FORMING THE SAME
    Publication number: 20220393017
    Abstract: A method for manufacturing a semiconductor product is provided. The method comprises forming a semiconductor device within a wafer utilizing a predetermined number of masks. The method further comprises forming a first low-leakage semiconductor device within the wafer utilizing a first set of additional masks. The first low-leakage semiconductor device has a lower leakage current than that of the semiconductor device.
    Type: Application
    Filed: June 7, 2021
    Publication date: December 8, 2022
    Inventors: YI-HSIUNG LIN, CHIEH CHIH TING, SIMON YAOU-DONG WANG
  • Dopant implantation method using multi-step implants
    Patent number: 8008158
    Abstract: A method of forming a dopant implant region in a MOS transistor device having a dopant profile having a target dopant concentration includes implanting a first concentration of dopants into a region of a substrate, where the first concentration of dopants is less than the target dopant concentration, and without annealing the substrate after the implanting step, performing at least one second implanting step to implant at least one second concentration of dopants into the region of the substrate to bring the dopant concentration in the region to the target dopant concentration.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: August 30, 2011
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tse-En Chang, Chih-Fu Chang, Bone-Fong Wu, Chieh Chih Ting, Shao Hua Wang, Pu-Fang Chen, Yen Chuang
  • DOPANT IMPLANTATION METHOD AND INTEGRATED CIRCUITS FORMED THEREBY
    Publication number: 20100009506
    Abstract: A method of forming a dopant implant region in a MOS transistor device having a dopant profile having a target dopant concentration includes implanting a first concentration of dopants into a region of a substrate, where the first concentration of dopants is less than the target dopant concentration, and without annealing the substrate after the implanting step, performing at least one second implanting step to implant at least one second concentration of dopants into the region of the substrate to bring the dopant concentration in the region to the target dopant concentration.
    Type: Application
    Filed: July 10, 2008
    Publication date: January 14, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tse-En Chang, Chih-Fu Chang, Bone-Fong Wu, Chieh Chih Ting, Shao Hua Wang, Pu-Fang Chen, Yen Chuang