Patents by Inventor Chieh-Jen Cheng
Chieh-Jen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230375952Abstract: Cleaning equipment for an EUV wafer chuck or clamp, which removes particles that have accumulated between burls on the surface of the wafer chuck. The equipment includes a spinning bi-polar electrode placed in proximity to the surface, which can attract and adsorb the charged particle residue therefrom using its generated symmetric electric field when the wafer chuck is not in use.Type: ApplicationFiled: August 8, 2023Publication date: November 23, 2023Inventors: Yu-Chih HUANG, Yu-Kai CHIOU, Chieh-Jen CHENG, Li-Jui CHEN
-
Publication number: 20230305381Abstract: A photo mask for an extreme ultraviolet (EUV) lithography includes a mask alignment mark for aligning the photo mask to an EUV lithography tool, and sub-resolution assist patterns disposed around the mask alignment mark. A dimension of the sub-resolution assist patterns is in a range from 10 nm to 50 nm.Type: ApplicationFiled: June 6, 2022Publication date: September 28, 2023Inventors: Wei-Shuo SU, Yu-Tse LAI, Sheng-Min WANG, Ken-Hsien HSIEH, Chieh-Jen CHENG, Ya Hui CHANG
-
Publication number: 20220308465Abstract: Cleaning equipment for an EUV wafer chuck or clamp, which removes particles that have accumulated between burls on the surface the wafer chuck. The equipment includes a spinning bi-polar electrode placed in proximity to the surface, which can attract and adsorb the charged particle residue therefrom using its generated symmetric electric field when the wafer chuck is not in use.Type: ApplicationFiled: September 28, 2021Publication date: September 29, 2022Inventors: Yu-Chih HUANG, Yu-Kai CHIOU, Chieh-Jen CHENG, Li-Jui CHEN
-
Publication number: 20220299882Abstract: An extreme ultraviolet (EUV) photolithography system includes a scanner. Photolithography system performs EUV photolithography processes with a reticle in the scanner. The scanner includes a reticle storage chamber, a reticle backside inspection chamber, and a reticle cleaning chamber. The reticle cleaning chamber cleans debris from the backside of the reticle within the scanner.Type: ApplicationFiled: September 17, 2021Publication date: September 22, 2022Inventors: Yuru Huang, Chueh-Chi Kuo, Tzung-Chi Fu, Chieh-Jen Cheng
-
Patent number: 11360392Abstract: An illuminator includes a first facet mirror receiving and reflecting an exposure radiation, an adjustable shielding element disposed on the first facet mirror, the adjustable shielding element adjusting intensity uniformity of the exposure radiation reflected by the first facet mirror, and a second facet mirror receiving and reflecting the exposure radiation reflected by the first facet mirror.Type: GrantFiled: June 3, 2020Date of Patent: June 14, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Che-Chang Hsu, Chieh-Jen Cheng, Li-Jui Chen, Shang-Chieh Chien, Chao-Chen Chang, Ssu-Yu Chen
-
Patent number: 11281586Abstract: The invention provides a processor including a prediction table, a prediction logic circuit, and a prediction verification circuit. The prediction table has a plurality of sets respectively corresponding to a plurality of cache sets of a cache memory in the cache system, each of the sets has a plurality of confidence values, and the prediction table provides the confidence values of a selected set according to the index. The prediction logic circuit receives the confidence values of the selected set, and generates a prediction result by judging whether each of the confidence values of the selected set is larger than a threshold value or not. The prediction verification circuit receives the prediction result, generates a correct/incorrect information according to the prediction result, and generates an update information according to the correct/incorrect information. Wherein, the prediction verification circuit updates the confidence values of the prediction table according to the update information.Type: GrantFiled: May 9, 2017Date of Patent: March 22, 2022Assignee: ANDES TECHNOLOGY CORPORATIONInventors: Kun-Ho Liu, Chieh-Jen Cheng, Chuan-Hua Chang, I-Cheng Kevin Chen
-
Patent number: 11188468Abstract: A processor includes a prediction table, a prediction logic circuit, and a prediction verification circuit. The prediction table has a plurality of sets, each of the sets has a hot way number, at least one warm way number, and at least one confidence value corresponding to the at least one warm way number. The prediction logic circuit generates a prediction result by predicting if the at least one warm way number is an opened way. The prediction verification circuit generates a correct/incorrect information according to the prediction result, and generates an update information according to the correct/incorrect information. The prediction verification circuit updates the hot way number, the at least one warm way number and the at least one confidence value of the at least one warm way number according to the update information.Type: GrantFiled: June 15, 2020Date of Patent: November 30, 2021Assignee: ANDES TECHNOLOGY CORPORATIONInventors: Kun-Ho Liu, Chieh-Jen Cheng, Chuan-Hua Chang, I-Cheng Kevin Chen
-
Publication number: 20210033982Abstract: An illuminator includes a first facet mirror receiving and reflecting an exposure radiation, an adjustable shielding element disposed on the first facet mirror, the adjustable shielding element adjusting intensity uniformity of the exposure radiation reflected by the first facet mirror, and a second facet mirror receiving and reflecting the exposure radiation reflected by the first facet mirror.Type: ApplicationFiled: June 3, 2020Publication date: February 4, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Che-Chang Hsu, Chieh-Jen Cheng, Li-Jui Chen, Shang-Chieh Chien, Chao-Chen Chang, Ssu-Yu Chen
-
Publication number: 20200310974Abstract: A processor includes a prediction table, a prediction logic circuit, and a prediction verification circuit. The prediction table has a plurality of sets, each of the sets has a hot way number, at least one warm way number, and at least one confidence value corresponding to the at least one warm way number. The prediction logic circuit generates a prediction result by predicting if the at least one warm way number is an opened way. The prediction verification circuit generates a correct/incorrect information according to the prediction result, and generates an update information according to the correct/incorrect information. The prediction verification circuit updates the hot way number, the at least one warm way number and the at least one confidence value of the at least one warm way number according to the update information.Type: ApplicationFiled: June 15, 2020Publication date: October 1, 2020Applicant: ANDES TECHNOLOGY CORPORATIONInventors: Kun-Ho Liu, Chieh-Jen Cheng, Chuan-Hua Chang, I-Cheng Kevin Chen
-
Patent number: 10579522Abstract: A method and a device for accessing a cache memory are provided. The method comprises: generating, by a bit prediction unit (BPU), a prediction bit corresponding to an instruction instructing to access the cache memory from a central processing unit (CPU); generating, by an instruction execution unit (IEU), a virtual address corresponding to the instruction; generating, by a load/store unit (LSU), a predicted cache index according to the prediction bit and a part of a virtual page offset of the virtual address; and reading, by the LSU, data from the cache memory by using the predicted cache index. Therefore, the maximum size of the cache memory could be increased.Type: GrantFiled: September 13, 2016Date of Patent: March 3, 2020Assignee: ANDES TECHNOLOGY CORPORATIONInventors: Chieh-Jen Cheng, Chuan-Hua Chang
-
Publication number: 20180330259Abstract: The invention provides a processor including a prediction table, a prediction logic circuit, and a prediction verification circuit. The prediction table has a plurality of sets respectively corresponding to a plurality of cache sets of a cache memory in the cache system, each of the sets has a plurality of confidence values, and the prediction table provides the confidence values of a selected set according to the index. The prediction logic circuit receives the confidence values of the selected set, and generates a prediction result by judging whether each of the confidence values of the selected set is larger than a threshold value or not. The prediction verification circuit receives the prediction result, generates a correct/incorrect information according to the prediction result, and generates an update information according to the correct/incorrect information. Wherein, the prediction verification circuit updates the confidence values of the prediction table according to the update information.Type: ApplicationFiled: May 9, 2017Publication date: November 15, 2018Applicant: ANDES TECHNOLOGY CORPORATIONInventors: Kun-Ho Liu, Chieh-Jen Cheng, Chuan-Hua Chang, I-Cheng Kevin Chen
-
Patent number: 10067418Abstract: A method of removing particles from a surface of a reticle is disclosed. The reticle is placed in a carrier, a source gas is flowed into the carrier, and a plasma is generated within the carrier. Particles are then removed from a surface of the reticle using the generated plasma. A system of removing particles from a surface includes a carrier configured to house a reticle, a reticle stocker including the carrier, a power supply configured to apply a potential between an inner cover and an inner baseplate of the carrier, and a gas source configured to flow a gas into the carrier. A plasma may be generated within the carrier, and particles can be removed from a surface of the reticle using the generated plasma. An acoustic energy source configured to agitate at least one of the source gas and the generated plasma may be provided to facilitate particle removal using an agitated plasma.Type: GrantFiled: May 12, 2014Date of Patent: September 4, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shu-Hao Chang, Chi-Lun Lu, Shang-Chieh Chien, Ming-Chin Chien, Jui-Ching Wu, Jeng-Horng Chen, Chieh-Jen Cheng, Chia-Chen Chen
-
Publication number: 20180074957Abstract: A method and a device for accessing a cache memory are provided. The method comprises: generating, by a bit prediction unit (BPU), a prediction bit corresponding to an instruction instructing to access the cache memory from a central processing unit (CPU); generating, by an instruction execution unit (IEU), a virtual address corresponding to the instruction; generating, by a load/store unit (LSU), a predicted cache index according to the prediction bit and a part of a virtual page offset of the virtual address; and reading, by the LSU, data from the cache memory by using the predicted cache index. Therefore, the maximum size of the cache memory could be increased.Type: ApplicationFiled: September 13, 2016Publication date: March 15, 2018Applicant: ANDES TECHNOLOGY CORPORATIONInventors: Chieh-Jen Cheng, Chuan-Hua Chang
-
Patent number: 9823585Abstract: Systems and methods for monitoring the focus of an EUV lithography system are disclosed. Another aspect includes a method having operations of measuring a first shift value for a first patterned set of sub-structures of a focus test structure on a wafer and measuring a second shift value for a second patterned set of sub-structures of the test structure on the wafer. The test structure may be formed on the wafer using asymmetric illumination, with the first patterned set of sub-structures having a first pitch and the second patterned set of sub-structures having a second pitch that is different from the first pitch. The method may further include determining a focus shift compensation for an illumination system based on a difference between the first shift value and the second shift value.Type: GrantFiled: September 14, 2015Date of Patent: November 21, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Tsung Shih, Chieh-Jen Cheng, Jeng-Horng Chen, Chia-Chen Chen, Shinn-Sheng Yu, Anthony Yen, Wei-Chih Lai
-
Publication number: 20160291482Abstract: Systems and methods for monitoring the focus of an EUV lithography system are disclosed. Another aspect includes a method having operations of measuring a first shift value for a first patterned set of sub-structures of a focus test structure on a wafer and measuring a second shift value for a second patterned set of sub-structures of the test structure on the wafer. The test structure may be formed on the wafer using asymmetric illumination, with the first patterned set of sub-structures having a first pitch and the second patterned set of sub-structures having a second pitch that is different from the first pitch. The method may further include determining a focus shift compensation for an illumination system based on a difference between the first shift value and the second shift value.Type: ApplicationFiled: September 14, 2015Publication date: October 6, 2016Inventors: Chih-Tsung Shih, Chieh-Jen Cheng, Jeng-Horng Chen, Chia-Chen Chen, Shinn-Sheng Yu, Anthony Yen, Wei-Chih Lai
-
Publication number: 20150323862Abstract: A method of removing particles from a surface of a reticle is disclosed. The reticle is placed in a carrier, a source gas is flowed into the carrier, and a plasma is generated within the carrier. Particles are then removed from a surface of the reticle using the generated plasma. A system of removing particles from a surface includes a carrier configured to house a reticle, a reticle stocker including the carrier, a power supply configured to apply a potential between an inner cover and an inner baseplate of the carrier, and a gas source configured to flow a gas into the carrier. A plasma may be generated within the carrier, and particles can be removed from a surface of the reticle using the generated plasma. An acoustic energy source configured to agitate at least one of the source gas and the generated plasma may be provided to facilitate particle removal using an agitated plasma.Type: ApplicationFiled: May 12, 2014Publication date: November 12, 2015Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shu-Hao Chang, Chi-Lun Lu, Shang-Chieh Chien, Ming-Chin Chien, Jui-Ching Wu, Jeng-Horng Chen, Chieh-Jen Cheng, Chia-Chen Chen
-
Patent number: 8919985Abstract: A backlight module includes a light guide plate, a light source module, a supporting frame, and a heat conductive glue layer. The light guide plate has a light-entering end; the light source module is disposed corresponding to the light-entering end and includes a flexible circuit board and a plurality of light sources. The flexible circuit board extends along the light-entering end and has a light source-bearing area and a heat-dissipating area, wherein a width of the heat-dissipating area in a direction perpendicular to the light-entering end is not smaller than a width of the light source-bearing area. The plurality of light sources are disposed in the light source-bearing area. The supporting frame has a holding portion which is bent to form an accommodation space for accommodating the light source module and the light-entering end.Type: GrantFiled: October 12, 2012Date of Patent: December 30, 2014Assignee: AU Optronics CorporationInventors: Chieh-Jen Cheng, Po-Hung Chen
-
Publication number: 20140233257Abstract: A light emitting module includes a first circuit board, a driver chip, two connectors, a second circuit board and a plurality of light emitting units. The driver chip is disposed on the first circuit board. The two connectors are disposed on the first circuit board and electrically connected to the driver chip. The second circuit board has two groups of connecting cables and each group of connecting cables is electrically connected to one of the two connectors. The light emitting units are disposed on the second circuit board and electrically connected to the two groups of connecting cables.Type: ApplicationFiled: October 4, 2013Publication date: August 21, 2014Applicant: AU Optronics Corp.Inventor: Chieh-Jen Cheng
-
Patent number: 8734000Abstract: A light module and an assembling method thereof are disclosed. The light module includes a first circuit board, a second circuit board, and a light source, wherein the first circuit board has a first opening and a second opening, and the second circuit board has a first bending portion. The light source is disposed on the first circuit board. The second circuit board passes through the first opening and the second opening of the first circuit board to form the first bending portion and the first circuit board and the second circuit board are fixed together to complete the light module assembling.Type: GrantFiled: June 2, 2011Date of Patent: May 27, 2014Assignee: Au Optronics CorporationInventors: Hsin-Chang Chiang, Chieh-Jen Cheng, Chien-Ting Liao
-
Patent number: 8646950Abstract: A display apparatus includes a panel module and a backlight module. The backlight module is disposed under the panel module. The backlight module includes a frame, a light guide plate, and a reflector. The frame supports the edge of the light guide plate. The reflector is disposed at the bottom of the light guide plate. The edge of the reflector and the edge of the frame horizontally form an engaging seam without overlapping, and the engaging seam is substantially in a serrated shape.Type: GrantFiled: October 23, 2012Date of Patent: February 11, 2014Assignee: AU Optronics CorporationInventors: Yi-Fan Lin, Shih-Yao Lin, Chieh-Jen Cheng, Po-Hung Chen