Patents by Inventor Chieh-Lung Wu

Chieh-Lung Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9847393
    Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate, a gate structure on the substrate, a spacer adjacent to the gate structure, an epitaxial layer in the substrate adjacent to two sides of the spacer, and a dislocation embedded within the epitaxial layer. Preferably, the top surface of the epitaxial layer is lower than the top surface of the substrate, and the top surface of the epitaxial layer has a V-shape.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: December 19, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Ming Hsu, Chun-Liang Kuo, Tsang-Hsuan Wang, Sheng-Hsu Liu, Chieh-Lung Wu, Chung-Min Tsai, Yi-Wei Chen
  • Publication number: 20170133470
    Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate, a gate structure on the substrate, a spacer adjacent to the gate structure, an epitaxial layer in the substrate adjacent to two sides of the spacer, and a dislocation embedded within the epitaxial layer. Preferably, the top surface of the epitaxial layer is lower than the top surface of the substrate, and the top surface of the epitaxial layer has a V-shape.
    Type: Application
    Filed: October 5, 2016
    Publication date: May 11, 2017
    Inventors: Yu-Ming Hsu, Chun-Liang Kuo, Tsang-Hsuan Wang, Sheng-Hsu Liu, Chieh-Lung Wu, Chung-Min Tsai, Yi-Wei Chen
  • Patent number: 9496396
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: (a) providing a substrate; (b) forming a gate structure on the substrate; (c) performing a first deposition process to form a first epitaxial layer adjacent to the gate structure and performing a first etching process to remove part of the first epitaxial layer at the same time; and (d) performing a second etching process to remove part of the first epitaxial layer.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: November 15, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Ming Hsu, Chun-Liang Kuo, Tsang-Hsuan Wang, Sheng-Hsu Liu, Chieh-Lung Wu, Chung-Min Tsai, Yi-Wei Chen
  • Patent number: 9397214
    Abstract: A semiconductor device is provided includes a substrate, a gate structure formed on the substrate, an epitaxial source/drain structure respectively formed at two sides of the gate structure, and a boron-rich interface layer. The boron-rich interface layer includes a bottom-and-sidewall portion and a top portion, and the epitaxial source/drain structure is enclosed by the bottom-and-sidewall portion and the top portion.
    Type: Grant
    Filed: February 16, 2015
    Date of Patent: July 19, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tien-Chen Chan, Hsin-Chang Wu, Chun-Yu Chen, Ming-Hua Chang, Sheng-Hsu Liu, Chieh-Lung Wu, Chung-Min Tsai, Neng-Hui Yang
  • Patent number: 9214551
    Abstract: A method for fabricating a semiconductor device, and a semiconductor device made with the method are described. In the method, a cavity is formed in a substrate, a first epitaxy process is performed under a pressure higher than 65 torr to form a buffer layer in the cavity, and a second epitaxy process is performed to form a semiconductor compound layer on the buffer layer in the cavity. In the semiconductor device, the ratio (S/Y) of the thickness S of the buffer layer on a lower sidewall of the cavity to the thickness Y of the buffer layer at the bottom of the cavity ranges from 0.6 to 0.8.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: December 15, 2015
    Assignee: United Microelectronics Corp.
    Inventors: Ming-Hua Chang, Tien-Wei Yu, I-Cheng Hu, Chieh-Lung Wu, Yu-Shu Lin, Chun-Jen Chen, Tsung-Mu Yang, Tien-Chen Chan, Chin-Cheng Chien
  • Publication number: 20150236158
    Abstract: A method for fabricating a semiconductor device, and a semiconductor device made with the method are described. In the method, a cavity is formed in a substrate, a first epitaxy process is performed under a pressure higher than 65 torr to form a buffer layer in the cavity, and a second epitaxy process is performed to form a semiconductor compound layer on the buffer layer in the cavity. In the semiconductor device, the ratio (S/Y) of the thickness S of the buffer layer on a lower sidewall of the cavity to the thickness Y of the buffer layer at the bottom of the cavity ranges from 0.6 to 0.8.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 20, 2015
    Applicant: United Microelectronics Corp.
    Inventors: Ming-Hua Chang, Tien-Wei Yu, I-Cheng Hu, Chieh-Lung Wu, Yu-Shu Lin, Chun-Jen Chen, Tsung-Mu Yang, Tien-Chen Chan, Chin-Cheng Chien