Patents by Inventor Chieh-Wei Lin

Chieh-Wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978801
    Abstract: A method of forming a semiconductor device includes surrounding a dummy gate disposed over a fin with a dielectric material; forming a gate trench in the dielectric material by removing the dummy gate and by removing upper portions of a first gate spacer disposed along sidewalls of the dummy gate, the gate trench comprising a lower trench between remaining lower portions of the first gate spacer and comprising an upper trench above the lower trench; forming a gate dielectric layer, a work function layer and a glue layer successively in the gate trench; removing the glue layer and the work function layer from the upper trench; filling the gate trench with a gate electrode material after the removing; and removing the gate electrode material from the upper trench, remaining portions of the gate electrode material forming a gate electrode.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jian-Jou Lian, Chun-Neng Lin, Chieh-Wei Chen, Tzu-Ang Chiang, Ming-Hsi Yeh
  • Publication number: 20240105818
    Abstract: A semiconductor device includes a gate electrode over a channel region of a semiconductor fin, first spacers over the semiconductor fin, and second spacers over the semiconductor fin. A lower portion of the gate electrode is between the first spacers. An upper portion of the gate electrode is above the first spacers. The second spacers are adjacent the first spacers opposite the gate electrode. The upper portion of the gate electrode is between the second spacers.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 28, 2024
    Inventors: Jian-Jou Lian, Chun-Neng Lin, Ming-Hsi Yeh, Chieh-Wei Chen, Tzu-Ang Chiang
  • Publication number: 20240096712
    Abstract: Provided is a semiconductor device includes a gate electrode, a gate dielectric layer, a channel layer, an insulating layer, a first source/drain electrode and a second source/drain electrode, a second dielectric layer, and a stop segment. The gate electrode is located within a first dielectric layer that overlies a substrate. The gate dielectric layer is located over the gate electrode. The channel layer is located on the gate dielectric layer. The insulating layer is located over the channel layer. The first source/drain electrode and the second source/drain electrode are located in the insulating layer, and connected to the channel layer. The second dielectric layer is beside one of the first source/drain electrode and the second source/drain electrode. The stop segment is embedded in the second dielectric layer.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Jiang, Chieh-Fang Chen, Yen-Chung Ho, Pin-Cheng Hsu, Feng-Cheng Yang, Chung-Te Lin
  • Publication number: 20240087902
    Abstract: The present disclosure is directed to methods and devices for devices including multiple die. A wafer is received having a plurality of die and a plurality of scribe lines. A dicing process is performed on the wafer. The dicing process includes identifying a first scribe line of the plurality of scribe lines, the first scribe line interposing a first die and a second die of the plurality of die; and performing a partial cut on the first scribe line. In embodiments, other scribe lines of the wafer are, during the dicing process, fully cut. After the dicing, the first die and the second die are mounted on a substrate such as an interposer. The first die and the second die are connected by a portion of the first scribe line, e.g., remaining from the partial cut, during the mounting.
    Type: Application
    Filed: January 19, 2023
    Publication date: March 14, 2024
    Inventors: Chieh-Lung LAI, Meng-Liang LIN, Chun-Yueh YANG, Hsien-Wei CHEN
  • Patent number: 11925440
    Abstract: A single smart health device able to monitor all physiological aspects of a human body includes a body fluid detection module, a temperature detection module, an electrocardiogram detection module, and a control module. The body fluid detection module tests and detects amounts of biological substances in body fluids. The temperature detection module detects a temperature of the human body. The electrocardiogram detection module detects a heart rate of the human body. The control module is electrically connected to the body fluid detection module, the temperature detection module, and the electrocardiogram detection module, and obtains the detected amounts of biological substances, the detected temperature, and the detected heart rate.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: March 12, 2024
    Assignee: Jiangyu Kangjian Innovation Medical Technology(Chengdu) Co., Ltd
    Inventors: Yu-Chao Li, Lien-Yu Lin, Ying-Wei Sheng, Chieh Kuo, Ping-Hao Liu
  • Publication number: 20240079356
    Abstract: An integrated circuit package includes an interposer, the interposer including: a first redistribution layer, a second redistribution layer over the first redistribution layer in a central region of the interposer, a dielectric layer over the first redistribution layer in a periphery of the interposer, the dielectric layer surrounding the second redistribution layer in a top-down view, a third redistribution layer over the second redistribution layer and the dielectric layer, and a first direct via extending through the dielectric layer. A conductive feature of the third redistribution layer is coupled to a conductive feature of the first redistribution layer through the first direct via.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 7, 2024
    Inventors: Hsien-Wei Chen, Chieh-Lung Lai, Meng-Liang Lin, Chun-Yueh Yang, Shin-Puu Jeng
  • Patent number: 7887338
    Abstract: A ground terminal is mounted on a circuit board. The circuit board has a through-hole. The ground terminal includes a main body, a tail part and an insertion part. The tail part is connected to the main body. The insertion part is extended downwardly from the tail part and aligned with the through-hole of the circuit board, and has a hooking element. After the insertion part is penetrated through the through-hole, the hooking element is sustained against a lower surface of the circuit board so as to facilitate fixing the ground terminal onto the circuit board.
    Type: Grant
    Filed: January 13, 2009
    Date of Patent: February 15, 2011
    Assignee: Delta Electronics, Inc.
    Inventors: Chieh-Wei Lin, Tsun-Sung Chen
  • Publication number: 20090181563
    Abstract: A ground terminal is mounted on a circuit board. The circuit board has a through-hole. The ground terminal includes a main body, a tail part and an insertion part. The tail part is connected to the main body. The insertion part is extended downwardly from the tail part and aligned with the through-hole of the circuit board, and has a hooking element. After the insertion part is penetrated through the through-hole, the hooking element is sustained against a lower surface of the circuit board so as to facilitate fixing the ground terminal onto the circuit board.
    Type: Application
    Filed: January 13, 2009
    Publication date: July 16, 2009
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Chieh-Wei Lin, Tsun-Sung Chen
  • Publication number: 20080133801
    Abstract: A KVM switch system and switching method are described. The KVM switch system for switching between a first computer and a second computer includes a first KVM switch, a second KVM switch and the synchronization cable. The first computer provides a first video source and a second video source. The second computer provides a third video source and a fourth video source. The synchronization cable couples the first KVM switch to the second KVM switch and transmits a control signal. In the beginning, the first KVM switch is coupled to the first video source and the second KVM switch is coupled to the second video source. When the first KVM switch is switched from the first video source to the third video source of the second computer, the first KVM switch controls the second KVM switch to select the fourth video source of the second computer by the control signal transmitted on the synchronization cable.
    Type: Application
    Filed: December 4, 2006
    Publication date: June 5, 2008
    Applicant: Aten International Co., Ltd.
    Inventors: Chih-tao Hsieh, Wei-min Huang, Chieh-wei Lin
  • Patent number: 6901631
    Abstract: A handle structure is provided. The handle structure adapted to secure a case in a frame of an electrical apparatus includes at least a handle, wherein the frame includes a protruding portion extending from the frame. Each of the handles includes a stem portion, an engaging portion pivotally connected to the case and further comprising a recess portion for engagement with the protruding portion of the frame, and a leaf spring structure being set at the other end of the stem portion for securing the case in the frame, wherein the handle is engaged with the case and the case is engaged with the frame when the case is secured in the frame, and the leaf spring structure is used for disengaging the handle from the case when the case is retracted from the frame.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: June 7, 2005
    Assignee: Delta Electronics, Inc.
    Inventor: Chieh-Wei Lin
  • Publication number: 20030112602
    Abstract: A composite heat-dissipating structure includes: a first heat-dissipating element detachably connected to a heat-generating device, and a second heat-dissipating element detachably connected to the first heat-dissipating element, wherein the first and second heat-dissipating elements are ones of standard pieces and portions of standard pieces and are flexibly assembled and changed without a necessity of redesigning a mold and a circuit board for the structure so as to dissipate a heat generated by the heat-generating device, and to meet space limitations for the heat-generating device being mounted on the first heat-dissipating element, for the first heat-dissipating element being mounted on the second heat-dissipating element, and for the second heat-dissipating element being mounted on the circuit board.
    Type: Application
    Filed: January 23, 2003
    Publication date: June 19, 2003
    Inventor: Chieh-Wei Lin
  • Publication number: 20020145854
    Abstract: A composite heat-dissipating structure applied in a circuit board is disclosed. The composite heat-dissipating structure includes a first heat-dissipating element connected to a heat-generating device, and a second heat-dissipating element detachably connected to the first heat-dissipating element, wherein the selection of the first and second heat-dissipating elements is dependent on a heat-generating rate of the heat-generating device and a particular space limitation for achieving a heat-dissipating effect.
    Type: Application
    Filed: October 18, 2001
    Publication date: October 10, 2002
    Inventor: Chieh-Wei Lin