Abstract: The invention relates to a logic control device of a serial peripheral interface, a master-slave system and a master-slave switchover method therefor. The logic control device is connected between N masters and M slaves, and define master-slave connection relationships between each of the masters and each of the slaves. Each of the master-slave connection relationship is that each of the masters and each of the slaves transmit information one-to-one at the same time, and includes connecting the logic control device between the masters and the slaves to form the master-slave system as well as the master-slave switchover method therefor.

Abstract: An abnormal detection circuit is provided. The abnormal detection circuit includes a conversion circuit, a voltage detection circuit, and a warning circuit. The conversion circuit receives a three-phase alternating current (AC) power and converts the three-phase AC power into a driving power. The voltage detection circuit detects each phase of the three-phase AC power. When a voltage value of at least one phase AC power of the three-phase AC power is abnormal, the voltage detection circuit uses the driving power to output at least one control signal corresponding to the abnormality. The warning circuit is driven by receiving the driving power and outputs at least one warning signal corresponding to the abnormality in response to the at least one control signal.

Abstract: A display panel including a circuit board, a plurality of bonding pads, a plurality of light emitting devices, and a plurality of solder patterns is provided. The bonding pads are disposed on the circuit board, and each includes a first metal layer and a second metal layer. The second metal layer is located between the first metal layer and the circuit board. The first metal layer includes an opening overlapping the second metal layer. A material of the first metal layer is different from a material of the second metal layer. The light emitting devices are electrically bonded to the bonding pads. Each of the solder patterns electrically connects one of the light emitting devices and one of the bonding pads. The solder patterns each contact the second metal layer through the opening of the first metal layer of one of the bonding pads to form a eutectic bonding.

Abstract: A method for reading data stored in a flash memory. The flash memory comprises a plurality of memory cells and each memory cell has a particular threshold voltage. The method includes: obtaining a first threshold voltage distribution representing threshold voltages of a first group of the memory cells; obtaining a second threshold voltage distribution representing threshold voltages of a second group of the memory cells, wherein the second threshold voltage distribution is different from the first threshold voltage distribution, and the first group of the memory cells comprises at least a part of the second group of the memory cells; and controlling the flash memory to perform at least one read operation upon the first group of the memory cells according to the second threshold voltage distribution.

Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.

Abstract: A resonant half-bridge flyback power converter includes: a first transistor and a second transistor which form a half-bridge circuit; a transformer and a resonant capacitor connected in series and coupled to the half-bridge circuit; and a switching control circuit configured to generate a first driving signal and a second driving signal to control the first transistor and the second transistor respectively for switching the transformer to generate an output voltage. The first driving signal is configured to magnetize the transformer. The second driving signal includes at most one pulse between two consecutive pulses of the first driving signal. The switching control circuit generates a skipping cycle period when an output power is lower than a predetermined threshold. A resonant pulse of the second driving signal is skipped during the skipping cycle period. The skipping cycle period is increased in response to the decrease of the output power.

Abstract: A method of reducing gray energy consumption and achieving optimal gray energy saving for carbon neutralization is proposed. In a cellular network, each cell or BS (group of cells) has renewable (green) and non-renewable (gray, on-grid power) energy sources. The renewable (green) energy is highly variable and unpredictable, while non-renewable (gray, on-grid power) is stable but is not renewable and thus has more carbon impact. Each cell or BS (group of cells) services is associated UEs when it is on. In one novel aspect, a cell or BS (group of cells) that consumes more non-renewable energy can give some or all of its served UEs to another cell or BS (group of cells) that consumes less non-renewable energy.

Abstract: Provided are structures and methods for forming structures with sloping surfaces of a desired profile. An exemplary method includes performing a first etch process to differentially etch a gate material to a recessed surface, wherein the recessed surface includes a first horn at a first edge, a second horn at a second edge, and a valley located between the first horn and the second horn; depositing an etch-retarding layer over the recessed surface, wherein the etch-retarding layer has a central region over the valley and has edge regions over the horns, and wherein the central region of the etch-retarding layer is thicker than the edge regions of the etch-retarding layer; and performing a second etch process to recess the horns to establish the gate material with a desired profile.

Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.

Abstract: A display driver circuit for controlling a display panel having a plurality of light-emission diode (LED) strings includes a plurality of current regulators and a control circuit. Each of the plurality of current regulators is configured to control one of the plurality of LED strings. The control circuit, coupled to the plurality of current regulators, is configured to generate a plurality of pulses in a plurality of pulse width modulation (PWM) signals and output each of the plurality of PWM signals to a respective current regulator among the plurality of current regulators. Wherein, the plurality of pulses are scrambled.

Abstract: A bracket is provided. The bracket includes a fixing seat and a holding seat. The fixing seat has a first extending direction and includes at least one first contacting end surface, and a first angle is contained between the at least one first contacting end surface and the first extending direction. The holding seat is detachably connected to the fixing seat with a bend angle to form a bend structure, and the holding seat includes at least one second contacting end surface corresponding to the at least one first contacting end surface. The at least one first contacting end surface and the at least one second contacting end surface are located near or at a bend portion of the bend structure.

Abstract: A laser automatic compensation control device includes a controller, a digital array, a decoder, a compensation array and a synchronizer. The controller is configured for receiving a number of laser energy signals and comparing each laser energy signal with a corresponding preset energy value to obtain a corresponding output digital signal. The digital array is electrically connected to the controller and configured for storing the output digital signals. The decoder is electrically connected to the digital array and configured for converting the output digital signals into a number of analog compensation signals. The compensation array is electrically connected to the decoder and configured for storing the analog compensation signals. The synchronizer is electrically connected to the compensation array and configured for receiving the analog compensation signals, and synchronously outputting the analog compensation signals to a laser diode array.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a semiconductor fin disposed over a substrate, wherein the semiconductor fin includes a channel region and a source/drain region; a gate structure disposed over the channel region of the semiconductor fin, wherein the gate structure includes a gate spacer and a gate stack; a source/drain structure disposed over the source/drain region of the semiconductor fin; and a fin top hard mask vertically interposed between the gate spacer and the semiconductor fin, wherein the fin top hard mask includes a dielectric layer, and wherein a sidewall of the fin top hard mask directly contacts the gate stack, and another sidewall of the fin top hard mask directly contacts the source/drain structure.

Abstract: A heterogeneous integration semiconductor package structure including a heat dissipation assembly, multiple chips, a package assembly, multiple connectors and a circuit substrate is provided. The heat dissipation assembly has a connection surface and includes a two-phase flow heat dissipation device and a first redistribution structure layer embedded in the connection surface. The chips are disposed on the connection surface of the heat dissipation assembly and electrically connected to the first redistribution structure layer. The package assembly surrounds the chips and includes a second redistribution structure layer disposed on a lower surface and multiple conductive vias electrically connected to the first redistribution structure layer and the second redistribution structure layer. The connectors are disposed on the package assembly and electrically connected to the second redistribution structure layer.

Abstract: A method for performing memory access of a Flash cell of a Flash memory includes: performing a series of sensing operations respectively corresponding to a plurality of sensing voltages, wherein a sensing voltage of a specific sensing operation of the series of sensing operations has a sensing voltage determined according to a result of an initial sensing operation of the series of sensing operations; determining a threshold voltage of the Flash cell according to at least a digital value generated by the series of sensing operations; and using the determined threshold voltage to perform soft decoding of the Flash cell.

Abstract: The disclosure provides a control method of a display driver. The control method includes receiving address information and defining an IC address according to the address information. The IC address includes n bits representing k zones, and n and k are positive integers. The control method further includes receiving the IC address, a black frame data signal and a pulse-width modulation (PWM) signal, and turning on or off the plurality of LEDs in the corresponding zone according to toggle of bit in the black frame data signal. Each bit in the black frame data signal indicates that a plurality of LEDs in a zone among the k zones are turned on or off.

Abstract: Disclosed is a semiconductor fabrication method. The method includes forming a gate stack in an area previously occupied by a dummy gate structure; forming a first metal cap layer over the gate stack; forming a first dielectric cap layer over the first metal cap layer; selectively removing a portion of the gate stack and the first metal cap layer while leaving a sidewall portion of the first metal cap layer that extends along a sidewall of the first dielectric cap layer; forming a second metal cap layer over the gate stack and the first metal cap layer wherein a sidewall portion of the second metal cap layer extends further along a sidewall of the first dielectric cap layer; forming a second dielectric cap layer over the second metal cap layer; and flattening a top layer of the first dielectric cap layer and the second dielectric cap layer using planarization operations.

Abstract: A device structure according to the present disclosure may include a first die having a first substrate and a first interconnect structure, a second die having a second substrate and a second interconnect structure, and a third die having a third interconnect structure and a third substrate. The first interconnect structure is bonded to the second substrate via a first plurality of bonding layers. The second interconnect structure is bonded to the third interconnect structure via a second plurality of bonding layers. The third substrate includes a plurality of photodiodes and a first transistor. The second die includes a second transistor having a source connected to a drain of the first transistor, a third transistor having a gate connected to drain of the first transistor and the source of the second transistor, and a fourth transistor having a drain connected to the source of the third transistor.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: An anti-torque safety hook includes a main body, a gate member, and a detent member. The main body has a hook opening passing through the front and back sides thereof, a passage communicating to the right side of the hook opening, a female buckle arranged on the passage, a connection unit arranged below the hook opening, and an energy absorption area arranged on the left side of the hook opening. The gate member has a first end mounted on the main body and a second end comprising a male buckle, adapted for detachably coupled with the female buckle, so as to allow the gate member to open and close the passage. The detent member is coupled on the main body and maintained at a first position, so as for ensuring that the gate member closes the passage, while when the detent member is operated and switched to a second position, the safety is disarmed. The present invention mainly utilizes the detent member to ensure the gate member to close the passage.