Patents by Inventor Chieh-Yu Lin

Chieh-Yu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170228491
    Abstract: Disclosed are methods, systems and computer program products that, during new technology node development, perform design rule and process assumption co-optimization using feature-specific layout-based statistical analyses. Specifically, the layout of a given feature can be analyzed to determine whether it complies with all of the currently established design rules in the new technology node. When the layout fails to comply with a current design rule, statistical analyses (e.g., Monte-Carlo simulations) of images, which are generated based on the layout and which illustrate different tolerances for and between the various shapes in the layout given current process assumption(s), can be performed. Based on the results of the analyses, the current process assumption(s) and/or the design rule itself can be adjusted using a co-optimization process in order to ensure the manufacturability of the feature within the technology.
    Type: Application
    Filed: February 10, 2016
    Publication date: August 10, 2017
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: James A. Culp, Chieh-Yu Lin, Dongbing Shao
  • Publication number: 20170012061
    Abstract: A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.
    Type: Application
    Filed: September 23, 2016
    Publication date: January 12, 2017
    Inventors: Wai-Kin Li, Chieh-Yu Lin, Yannick Daurelle
  • Patent number: 9515148
    Abstract: A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: December 6, 2016
    Assignees: International Business Machines Corporation, STMicroelectronics, Inc.
    Inventors: Wai-Kin Li, Chieh-Yu Lin, Yannick Daurelle
  • Patent number: 9117051
    Abstract: A design layout includes a set of active region-level design shapes representing semiconductor active regions, and a set of gate-level design shapes representing gate lines straddling the semiconductor active regions. The set of gate-level design shapes include a sub-resolution assist feature (SRAF) that connects two gate-level design shapes, and is physically manifested as a gap between two gate lines upon printing employing lithographic methods. An edge of a gate line in proximity to a semiconductor active region can be cut employing a cut mask that includes a cut-level design shape that has a protruding tap. The protruding tap allows reliable removal of an end portion of a gate line and prevents disruption of raised source and drain regions by an unwanted residual gate structure.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: August 25, 2015
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chieh-yu Lin, Kehan Tian, Sanghoon Baek
  • Publication number: 20150234974
    Abstract: A three color map can be built based on an integrated circuit (IC) layout, each color representing an exposure in a multiple (here triple) patterning lithography process and can include any combination of additive and/or subtractive exposures. A series of design rules can start with color-specific rules before considering any combination of colors and/or exposures. If the map fails any rule, building the map can be repeated with adjustments and it can be assessed with the design rules.
    Type: Application
    Filed: February 17, 2014
    Publication date: August 20, 2015
    Applicants: Samsung Electronics Co., Ltd., International Business Machines Corporation
    Inventors: Daniel J. Dechene, Sutae Kim, Chieh-yu Lin
  • Publication number: 20150129961
    Abstract: A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.
    Type: Application
    Filed: November 11, 2013
    Publication date: May 14, 2015
    Applicants: STMicroelectronics, INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wai-Kin Li, Chieh-Yu Lin, Yannick Daurelle
  • Publication number: 20150111367
    Abstract: A design layout includes a set of active region-level design shapes representing semiconductor active regions, and a set of gate-level design shapes representing gate lines straddling the semiconductor active regions. The set of gate-level design shapes include a sub-resolution assist feature (SRAF) that connects two gate-level design shapes, and is physically manifested as a gap between two gate lines upon printing employing lithographic methods. An edge of a gate line in proximity to a semiconductor active region can be cut employing a cut mask that includes a cut-level design shape that has a protruding tap. The protruding tap allows reliable removal of an end portion of a gate line and prevents disruption of raised source and drain regions by an unwanted residual gate structure.
    Type: Application
    Filed: October 21, 2013
    Publication date: April 23, 2015
    Applicants: Samsung Electronics Co., Ltd., International Business Machines Corporation
    Inventors: Chieh-yu Lin, Kehan Tian, Sanghoon Baek
  • Publication number: 20150102047
    Abstract: In duration of operating a vending machine, the vending machine can only provide a consumer with a simple service and cannot interact with the consumer. The vending machine is lack of and interactive feeling capable of catching the consumer's eyes and lets the consumer feeling novel and interesting, so that a sales volume of products cannot be raised. A vending apparatus and a product vending method of the invention can detect a consumer's operation by using a detector and a currency collecting device, and display a corresponding image on a screen according to the consumer's operation. Moreover, delivery of an actual object is in accordance with an image of object delivery, such that the consumer can smoothly feel the interactive feeling when purchasing products. Accordingly, the vending apparatus provides the consumer with a novel and interactive pattern, so as to elevate the consumer's purchase desire.
    Type: Application
    Filed: January 28, 2014
    Publication date: April 16, 2015
    Applicant: UTECHZONE CO., LTD.
    Inventors: Chia-Chun Tsou, Yi-Fan Chen, Chieh-Yu Lin
  • Publication number: 20150100464
    Abstract: During shopping, a customer usually needs a shop clerk to provide a consulting service for understanding product information. However, a selling approach of the shop clerk may cause the customer to feel pressure. Moreover, due to the limited space, it is impossible to lay out all products in the store for the customer's selection. An information displaying apparatus for objects and a method thereof, provided by the invention, detect an operation of the customer by a motion detector and display an interactive image corresponding to the operation by a screen for providing abundant product information. Accordingly, the information displaying apparatus displays all products and sufficient product information in a limited space, and creates a relaxing and convenient shopping environment for increasing the customer's desire to purchase.
    Type: Application
    Filed: January 29, 2014
    Publication date: April 9, 2015
    Applicant: UTECHZONE CO., LTD.
    Inventors: Chia-Chun Tsou, Yi-Fan Chen, Chieh-Yu Lin
  • Publication number: 20150073914
    Abstract: A playing method and an electronic apparatus are provided. The method includes analyzing an image captured from an image capturing unit to detect whether the image includes a body image; when the image including the body image is detected, calculating a relative distance between the body image and a display unit; when the relative distance is less than or equal to a preset distance, playing a special effect object in the display unit; and transforming a dynamic effect of the special effect object according to a movement information of the body image.
    Type: Application
    Filed: January 16, 2014
    Publication date: March 12, 2015
    Applicant: UTECHZONE CO., LTD.
    Inventors: Chia-Chun Tsou, Yi-Fan Chen, Chieh-Yu Lin
  • Publication number: 20150063631
    Abstract: A dynamic image analyzing system is provided, comprising: a photographing unit for taking pictures to acquire image, and a processing unit. The processing unit includes a space information analyzing module, a virtual frame forming module, and a transforming module. The space information analyzing module is used to acquire space information of user at the world coordinate system. The virtual frame forming module is used to access the space information of user at world coordinate system and to span a virtual operating frame in front of user, wherein the virtual operating frame comprises a plurality of projecting coordinate systems disturbed in front of user, between two projecting coordinate systems has an angle, and the projecting coordinate systems are sequentially sorted into a semi-arc surface. The transforming module is used to compute the position of user's hands at the world coordinate system into the projecting position at the projecting coordinate systems.
    Type: Application
    Filed: December 27, 2013
    Publication date: March 5, 2015
    Applicant: UTECHZONE CO., LTD.
    Inventor: Chieh-Yu Lin
  • Publication number: 20150062010
    Abstract: The present invention provides a pointing-direction detecting device, comprising an image capturing unit for capturing a user's image to acquire the user's skeleton data in the world coordinate system; and a processing unit connected to the image capturing unit. The processing unit comprises an image analyzing module and a pointing-direction analyzing module. The image analyzing module acquires the skeleton data from the image capturing unit and captures an upper limb image of the skeleton data to obtain respectively a hand-terminal region and an elbow or shoulder region. The pointing-direction analyzing module obtains the hand-terminal region and the elbow or shoulder region from the image analyzing module to identify through calculation a hand-terminal position and an elbow or shoulder position, obtaining a pointing-direction vector from the hand-terminal position and the elbow or shoulder position for calculating the intersection of the extension of the pointing-direction vector and the target plane.
    Type: Application
    Filed: February 24, 2014
    Publication date: March 5, 2015
    Applicant: UTECHZONE CO., LTD.
    Inventors: Chieh-Yu LIN, Yi-Wen CHEN
  • Publication number: 20150058811
    Abstract: A control system for a display screen, an input apparatus and a control method are provided. An image capturing unit is used to continuously capture an image toward a first side of a display apparatus, and a processing unit is used to execute an image analyzing process for the captured image. The image analyzing process includes the following steps. Whether an object enters an initial sensing space located at the first side is detected. A virtual operating plane is established according to a location of the object when the object enters the initial sensing space is detected, wherein a size of the virtual operating plane is proportioned to a size of the display screen. A movement information of the object in the virtual operating plane is detected for controlling content of the display screen through the movement information.
    Type: Application
    Filed: January 14, 2014
    Publication date: February 26, 2015
    Applicant: UTECHZONE CO., LTD.
    Inventors: Chia-Chun Tsou, Chieh-Yu Lin, Yi-Wen Chen
  • Publication number: 20140375777
    Abstract: A three-dimensional (3D) interactive system and an interactive sensing method are provided. The 3D interactive system includes a display unit, an image capturing unit and a processing unit. The display unit is configured to display a frame on a display area, and the display area is located on a display plane. The image capturing unit is disposed at a periphery of the display area. The image capturing unit captures images along a first direction and generates an image information accordingly, and the first direction is not parallel to a normal direction of the display plane. The processing unit detects a position of an object located in a sensing space according to the image information, and executes an operational function to control the display content of the frame according to the detected position.
    Type: Application
    Filed: January 15, 2014
    Publication date: December 25, 2014
    Applicant: UTECHZONE CO., LTD.
    Inventors: Yi-Wen Chen, Chieh-Yu Lin
  • Patent number: 7962865
    Abstract: A system and method of employing patterning process statistics to evaluate layouts for intersect area analysis includes applying Optical Proximity Correction (OPC) to the layout, simulating images formed by the mask and applying patterning process variation distributions to influence and determine corrective actions taken to improve and optimize the rules for compliance by the layout. The process variation distributions are mapped to an intersect area distribution by creating a histogram based upon a plurality of processes for an intersect area. The intersect area is analyzed using the histogram to provide ground rule waivers and optimization.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Fook-Luen Heng, Mark Alan Lavin, Jin-Fuw Lee, Chieh-yu Lin, Jawahar Pundalik Nayak, Rama Nand Singh
  • Patent number: 7501212
    Abstract: A method is described for computing distance based and pattern density based design rules for the mask layout design of a VLSI chip so that the design satisfying the above design rules when manufactured on a wafer do not violate the specified tolerance on the critical dimensions (CD). The design rules are developed on the computed enclosed energy which is a convolution of the total optical energy and the pattern density of the mask. The total optical energy is the sum of the short range diffraction limited optical energy and the long range optical flare.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: March 10, 2009
    Assignee: International Business Machines Corporation
    Inventors: Kafai Lai, Chieh-Yu Lin, Nayak Jawahar, Mukherjee Maharaj
  • Publication number: 20080301624
    Abstract: A system and method of employing patterning process statistics to evaluate layouts for intersect area analysis includes applying Optical Proximity Correction (OPC) to the layout, simulating images formed by the mask and applying patterning process variation distributions to influence and determine corrective actions taken to improve and optimize the rules for compliance by the layout. The process variation distributions are mapped to an intersect area distribution by creating a histogram based upon a plurality of processes for an intersect area. The intersect area is analyzed using the histogram to provide ground rule waivers and optimization.
    Type: Application
    Filed: July 17, 2008
    Publication date: December 4, 2008
    Inventors: Fook-Luen Heng, Mark Alan Lavin, Jin-Fuw Lee, Chieh-yu Lin, Jawahar Pundalik Nayak, Rama Nand Singh
  • Patent number: 7448018
    Abstract: A system and method of employing patterning process statistics to evaluate layouts for intersect area analysis includes applying Optical Proximity Correction (OPC) to the layout, simulating images formed by the mask and applying patterning process variation distributions to influence and determine corrective actions taken to improve and optimize the rules for compliance by the layout. The process variation distributions are mapped to an intersect area distribution by creating a histogram based upon a plurality of processes for an intersect area. The intersect area is analyzed using the histogram to provide ground rule waivers and optimization.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: November 4, 2008
    Assignee: International Business Machines Corporation
    Inventors: Fook-Luen Heng, Mark Alan Lavin, Jin-Fuw Lee, Chieh-yu Lin, Jawahar Pundalik Nayak, Rama Nand Singh
  • Publication number: 20080066047
    Abstract: A system and method of employing patterning process statistics to evaluate layouts for intersect area analysis includes applying Optical Proximity Correction (OPC) to the layout, simulating images formed by the mask and applying patterning process variation distributions to influence and determine corrective actions taken to improve and optimize the rules for compliance by the layout. The process variation distributions are mapped to an intersect area distribution by creating a histogram based upon a plurality of processes for an intersect area. The intersect area is analyzed using the histogram to provide ground rule waivers and optimization.
    Type: Application
    Filed: September 12, 2006
    Publication date: March 13, 2008
    Inventors: Fook-Luen Heng, Mark Alan Lavin, Jin-Fuw Lee, Chieh-yu Lin, Jawahar Pundalik Nayak, Rama Nand Singh
  • Patent number: 7090967
    Abstract: A method of transferring a pattern onto a substrate, in the fabrication of ICs, is disclosed. The substrate is coated with a photoresist layer, wherein the photoresist layer is selectively exposed and developed, producing sidewalls that exhibit roughness. The roughness is smoothened out by coating the photoresist layer with a coating layer.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: August 15, 2006
    Assignee: Infineon Technologies AG
    Inventors: Zhijian Lu, Chieh-Yu Lin