Patents by Inventor Chien Chang

Chien Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142749
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a first movable assembly and a first driving assembly. The first movable assembly is configured to connect a first optical element, and the first movable assembly is movable relative to the fixed assembly. The first driving assembly is configured to drive the first movable assembly to move relative to the fixed assembly in a first dimension.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: Chao-Chang HU, Chen-Hsien FAN, Chih-Wen CHIANG, Chien-Yu KAO
  • Publication number: 20240144467
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Patent number: 11973040
    Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes providing a substrate for an interposer, and forming a conductive interconnect structure in and on the substrate for connecting a group of selected IC dies. The method includes forming warpage-reducing trenches in non-routing regions of the interposer, wherein the warpage-reducing trenches are sized and positioned based on a warpage characteristic to reduce the warpage of the chip package structure. The method also includes depositing a warpage-relief material in the warpage-reducing trenches according to the warpage characteristic to reduce the warpage of the chip package structure, and bonding the group of selected IC dies to the interposer to form a chip package structure.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Yang Hsieh, Chien-Chang Lee, Chia-Ping Lai, Wen-Chung Lu, Cheng-Kang Huang, Mei-Shih Kuo, Alice Huang
  • Patent number: 11973522
    Abstract: Aspects of this disclosure relate to a front end architecture for selectively adding an external carrier aggregation band. A switch element can connect a radio frequency signal path to an antenna path through a frequency domain multiplexer, such as a diplexer, in a first mode. The switch element can connect the radio frequency path to the antenna path and bypass the frequency domain multiplexer in a second mode. The frequency domain multiplexer can be external to a front end module that include the radio frequency signal path. In the first mode, a front end system can support carrier aggregation with a band associated with circuitry implemented external to the front end module.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: April 30, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventors: Jen-Chien Chang, Reza Kasnavi, Roman Zbigniew Arkiszewski, Jeffrey Gordon Strahler, John G. Freed
  • Patent number: 11969727
    Abstract: Present invention is related to a tumor microenvironment on chip or a biochip for cell therapy having a carrier, a first cell or tissue culture area and a second cell or tissue area imbedded within the carrier. The present invention provides a biochip successfully cooperating micro fluidic technology and cell culture achieving the goal for detecting or testing the function of cell therapy for cancer or tumor.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: April 30, 2024
    Assignees: China Medical University, China Medical University Hospital
    Inventors: Yi-Wen Chen, Ming-You Shie, Der-Yang Cho, Shao-Chih Chiu, Kai-Wen Kan, Chien-Chang Chen
  • Patent number: 11973052
    Abstract: An electronic device includes a bond wire with a first end bonded by a ball bond to a planar side of a first conductive plate, and a second end bonded by a stitch bond to a conductive stud bump at an angle greater than or equal to 60 degrees. A wirebonding method includes bonding the first end of the conductive bond wire to the first conductive plate includes forming a ball bond to join the first end of the conductive bond wire to a planar side of the first conductive plate by a ball bond, and bonding the second end of the conductive bond wire to the conductive stud bump includes forming a stitch bond to join the second end of the conductive bond wire to the conductive stud bump.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: April 30, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Chien-Chang Li, Hung-Yu Chou, Sheng-Wen Huang, Zi-Xian Zhan, Byron Lovell Williams
  • Publication number: 20240134268
    Abstract: A mask for use in a semiconductor lithography process includes a substrate, a mask pattern disposed on the substrate, and a light absorbing border surrounding the mask pattern. The light absorbing border is inset from at least two edges of the substrate to define a peripheral region outside of the light absorbing border. In some designs, a first peripheral region extends from an outer perimeter of the light absorbing border to a first edge of the substrate, and a second peripheral region that extends from the outer perimeter of the light absorbing border to a second edge of the substrate, where the first edge of the substrate and the second edge of the substrate are on opposite sides of the mask pattern.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Chien-Cheng Chen, Huan-Ling Lee, Ta-Cheng Lien, Chia-Jen Chen, Hsin-Chang Lee
  • Publication number: 20240136191
    Abstract: A method of forming a semiconductor device includes forming source/drain regions on opposing sides of a gate structure, where the gate structure is over a fin and surrounded by a first dielectric layer; forming openings in the first dielectric layer to expose the source/drain regions; selectively forming silicide regions in the openings on the source/drain regions using a plasma-enhanced chemical vapor deposition (PECVD) process; and filling the openings with an electrically conductive material.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Min-Hsiu Hung, Chien Chang, Yi-Hsiang Chao, Hung-Yi Huang, Chih-Wei Chang
  • Patent number: 11963969
    Abstract: Provided is a pharmaceutical composition including gastrodin and a use thereof for the prevention or the treatment of amyotrophic lateral sclerosis. The pharmaceutical composition is effective in reducing neuronal axon degeneration and neurofibromin accumulation, improving symptoms of amyotrophic lateral sclerosis and extending life of patients of amyotrophic lateral sclerosis.
    Type: Grant
    Filed: September 16, 2022
    Date of Patent: April 23, 2024
    Assignee: BUDDHIST TZU CHI MEDICAL FOUNDATION
    Inventors: Chia-Yu Chang, Shinn-Zong Lin, Hsiao-Chien Ting, Hui-I Yang, Horng-Jyh Harn, Hong-Lin Su, Ching-Ann Liu, Yu-Shuan Chen, Tzyy-Wen Chiou, Tsung-Jung Ho
  • Patent number: 11967594
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a stack of semiconductor layers spaced apart from and aligned with each other, a first source/drain epitaxial feature in contact with a first one or more semiconductor layers of the stack of semiconductor layers, and a second source/drain epitaxial feature disposed over the first source/drain epitaxial feature. The second source/drain epitaxial feature is in contact with a second one or more semiconductor layers of the stack of semiconductor layers. The structure further includes a first dielectric material disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature and a first liner disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature. The first liner is in contact with the first source/drain epitaxial feature and the first dielectric material.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Cheng Chen, Zhi-Chang Lin, Jung-Hung Chang, Lo Heng Chang, Chien Ning Yao, Kuo-Cheng Chiang, Chih-Hao Wang
  • Publication number: 20240127944
    Abstract: A fatigue data generation method, comprising: obtaining, by the camera device, a target image; obtaining, by a processor, a target feature data from the target image, and inputting the target feature data to a fatigue analysis model which stored in a storage unit, wherein the fatigue analysis model comprises a plurality of reference physiological signals, a plurality of reference feature data, a plurality of reference fatigue data and a plurality of correlation parameters; and generating a target fatigue data according to the target feature data, the plurality of reference feature data and the plurality of correlation parameters.
    Type: Application
    Filed: November 17, 2022
    Publication date: April 18, 2024
    Inventors: Wen-Chien HUANG, Hong-En CHEN, Hsiao-Chen CHANG, Jing-Ming CHIU
  • Publication number: 20240123462
    Abstract: An atomization module includes a base, an auxiliary fixing member, an atomization member, a piezoelectric element, a conductive member, and a waterproof member. The base includes a support portion and an outer annular portion. The support portion has a first opening, the outer annular portion surrounds the support portion, and the support portion protrudes relative to the outer annular portion. The auxiliary fixing member is disposed on the support portion, and has a second opening. The second opening is opposite to the first opening. The atomization member is disposed between the support portion and the auxiliary fixing member. The piezoelectric element is disposed on the outer annular portion, and the piezoelectric element and the atomization member are disposed on a same side of the base. The conductive member is electrically connected to the piezoelectric element. The waterproof member at least partially covers the piezoelectric element.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 18, 2024
    Inventors: CHIA-CHIEN CHANG, HSIN-YI PAI, CHUN-CHIA JUAN
  • Patent number: 11960381
    Abstract: A memory check method, a memory check device and a memory check system are disclosed. The method includes the following. A debug file is generated according to a source code, where the debug file carries symbol information related to a description message in the source code. Memory data generated by a memory storage device in execution of a firmware is received. The debug file is loaded to automatically analyze the memory data. In addition, an analysis result is presented by an application program interface, where the analysis result reflects a status of the firmware with assistance of the symbol information.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: April 16, 2024
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chien Chang Tseng
  • Publication number: 20240121547
    Abstract: A venting device includes a first flap, which is configured to be actuated to swing upward during a rising time, and a second flap, which is disposed opposite to the first flap and configured to be actuated to swing downward during a falling time, a first actuating portion disposed on the first flap, and a second actuating portion disposed on the second flap. The venting device configured to form a vent is disposed within a wearable sound device or to be disposed within the wearable sound device. The vent is formed via applying a first voltage to the first actuating portion and applying a second voltage on the second actuating portion, such that the venting device gradually forms the vent.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 11, 2024
    Applicant: xMEMS Labs, Inc.
    Inventors: Wen-Chien Chen, Kai-Chieh Chang, Chiung C. Lo, Yuan-Shuang Liu
  • Publication number: 20240111125
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a first movable assembly and a first driving assembly. The first movable assembly is configured to connect a first optical element, and the first movable assembly is movable relative to the fixed assembly. The first driving assembly is configured to drive the first movable assembly to move relative to the fixed assembly in a first dimension.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 4, 2024
    Inventors: Chao-Chang HU, Chen-Hsien FAN, Chih-Wen CHIANG, Chien-Yu KAO
  • Publication number: 20240113237
    Abstract: The present disclosure provides a semiconductor structure and a method of manufacturing the same. The semiconductor structure includes a sensing device, a solar cell, and an interconnecting structure. The solar cell is disposed above the sensing device and is electrically connected to the sensing device. The interconnecting structure is disposed between the sensing device and the solar cell and has a first surface facing the solar cell and a second surface facing the sensing devices. The interconnecting structure comprises a first energy storage component and a second energy storage component. The first energy storage component is disposed closer to the first surface of the interconnecting structure than the second energy storage component.
    Type: Application
    Filed: January 10, 2023
    Publication date: April 4, 2024
    Inventors: FENG-CHIEN HSIEH, YUN-WEI CHENG, KUO-CHENG LEE, CHENG-MING WU, PING KUAN CHANG
  • Publication number: 20240113187
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having one or more interior surfaces forming a recess within an upper surface of the substrate. Source/drain regions are disposed within the substrate on opposing sides of the recess. A first gate dielectric is arranged along the one or more interior surfaces forming the recess, and a second gate dielectric is arranged on the first gate dielectric and within the recess. A gate electrode is disposed on the second gate dielectric. The second gate dielectric includes one or more protrusions that extend outward from a recessed upper surface of the second gate dielectric and that are arranged along opposing sides of the second gate dielectric.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Jhu-Min Song, Ying-Chou Chen, Yi-Kai Ciou, Chien-Chih Chou, Fei-Yun Chen, Yu-Chang Jong, Chi-Te Lin
  • Publication number: 20240111121
    Abstract: An imaging lens module includes a plastic lens barrel, a first optical element assembly and a second optical element assembly, wherein both of the first optical element assembly and the second optical element assembly are disposed in the plastic lens barrel. The plastic lens barrel includes a first inner annular surface and a second inner annular surface. The first inner annular surface forms a first receiving space. The second inner annular surface forms a second receiving space. The first optical element assembly is disposed in the first receiving space and includes a plurality of optical lens elements and a first retainer. The second optical element assembly is disposed in the second receiving space and includes a first light blocking sheet and a second retainer.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 4, 2024
    Inventors: Chien-Hsun WU, Lin-An CHANG, Ming-Ta CHOU
  • Publication number: 20240101784
    Abstract: A novel additive for recycling thermoset materials, its related recyclable thermoset composition and its application are disclosed. Specifically, the composition of the additive comprises at least one copolymer that has at least one carbamate group, at least one carbonate group and/or at least one urea group, and a number-average molecular weight of the copolymer is between 100 and 50,000 Da.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 28, 2024
    Inventors: Chien-Hsin Wu, Ying-Chi Huang, Ying-Feng Lin, Wen-Chang Chen, Ho-Ching Huang, Ru-Jong Jeng
  • Publication number: 20240103578
    Abstract: A control assembly configured for an electronic device, the control assembly includes a mount seat configured to be installed on the electronic device, two first connection components movably connected to the mount seat, two second connection component movably connected to the two first connection components, respectively, two controllers configured to communicate with the electronic device, the two controllers are separated apart from each other and movably connected to the second connection components, respectively, such that the two controllers are connected to the mount seat via the two second connection components and the two first connection components.
    Type: Application
    Filed: November 25, 2022
    Publication date: March 28, 2024
    Applicant: DEXIN CORP.
    Inventors: Ho Lung LU, Chiu Tai CHANG, Min-Chien CHANG