Patents by Inventor Chien-Chang Lai

Chien-Chang Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973040
    Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes providing a substrate for an interposer, and forming a conductive interconnect structure in and on the substrate for connecting a group of selected IC dies. The method includes forming warpage-reducing trenches in non-routing regions of the interposer, wherein the warpage-reducing trenches are sized and positioned based on a warpage characteristic to reduce the warpage of the chip package structure. The method also includes depositing a warpage-relief material in the warpage-reducing trenches according to the warpage characteristic to reduce the warpage of the chip package structure, and bonding the group of selected IC dies to the interposer to form a chip package structure.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Yang Hsieh, Chien-Chang Lee, Chia-Ping Lai, Wen-Chung Lu, Cheng-Kang Huang, Mei-Shih Kuo, Alice Huang
  • Patent number: 9244018
    Abstract: A probe holding structure includes a substrate and a plurality of holding modules. The substrate has an opening and a plurality of grooves arranged around a periphery of the opening. The holding modules are connected with the grooves, respectively. Each holding modules includes a fixing member and a plurality of probes. The fixing member is connected with a corresponding groove. The probes are connected with the fixing member and pass through the corresponding groove. The probe holding structure is combined with a lens adjusting mechanism having a lens to form an optical inspection device for testing electric characteristics of chips.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: January 26, 2016
    Assignee: MPI Corporation
    Inventors: Chia-Tai Chang, Chin-Yi Tsai, Chiu-Kuei Chen, Chen-Chih Yu, Chien-Chang Lai, Chin-Tien Yang, Hui-Pin Yang, Keng-Shieng Chang, Yun-Ru Huang
  • Patent number: 9201098
    Abstract: A high frequency probe card includes at least one substrate having at least one first opening, an interposing plate disposed on the at least one substrate and having at least one second opening corresponding to the at least one first opening, a circuit board disposed on the interposing plate and having a third opening corresponding to the at least one first and second openings, and at least one probe module including at least one ground probe and at least one high frequency signal probe passing through the corresponding substrate, the interposing plate and the third opening and being electrically connected with the circuit board. Each high frequency signal probe includes a signal probe and a first conductor corresponding to the signal probe and being electrically connected with the ground probe. An insulation layer is disposed between the first conductor and the signal probe.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: December 1, 2015
    Assignee: MPI CORPORATION
    Inventors: Chia-Tai Chang, Chin-Yi Tsai, Chiu-Kuei Chen, Chen-Chih Yu, Chien-Chang Lai, Chin-Tien Yang, Hui-Pin Yang, Keng-Shieng Chang, Yun-Ru Huang
  • Publication number: 20140015561
    Abstract: A high frequency probe card includes at least one substrate having at least one first opening, an interposing plate disposed on the at least one substrate and having at least one second opening corresponding to the at least one first opening, a circuit board disposed on the interposing plate and having a third opening corresponding to the at least one first and second openings, and at least one probe module including at least one N-type ground probe and at least one high frequency signal probe passing through the corresponding substrate, the interposing plate and the third opening and being electrically connected with the circuit board. Each high frequency signal probe includes an N-type signal probe and a first conductor corresponding to the N-type signal probe and being electrically connected with the N-type ground probe. An insulation layer is disposed between the first conductor and the N-type signal probe.
    Type: Application
    Filed: July 12, 2013
    Publication date: January 16, 2014
    Inventors: Chia-Tai CHANG, Chin-Yi TSAI, Chiu-Kuei CHEN, Chen-Chih YU, Chien-Chang LAI, Chin-Tien YANG, Hui-Pin YANG, Keng-Shieng CHANG, Yun-Ru HUANG
  • Publication number: 20140016123
    Abstract: A probe holding structure includes a substrate and a plurality of holding modules. The substrate has an opening and a plurality of grooves arranged around a periphery of the opening. The holding modules are connected with the grooves, respectively. Each holding modules includes a fixing member and a plurality of probes. The fixing member is connected with a corresponding groove. The probes are connected with the fixing member and pass through the corresponding groove. The probe holding structure is combined with a lens adjusting mechanism having a lens to form an optical inspection device for testing electric characteristics of chips.
    Type: Application
    Filed: July 12, 2013
    Publication date: January 16, 2014
    Inventors: Chia-Tai CHANG, Chin-Yi TSAI, Chiu-Kuei CHEN, Chen-Chih YU, Chien-Chang LAI, Chin-Tien YANG, Hui-Pin YANG, Keng-Shieng CHANG, Yun-Ru HUANG
  • Publication number: 20140016124
    Abstract: An optical inspection device includes a circuit board having at least one first opening, a mounting plate disposed on a top or bottom surface of the circuit board and having at least one second opening corresponding to the at least one first opening respectively, at least one lens holder received in the at least one second opening, and at least one probe module disposed on a bottom surface of the mounting plate or the bottom surface of the circuit board, corresponding to the at least one lens holder respectively, and having probes electrically connected with the circuit board. Each lens holder has an accommodation for accommodating a lens, and is operatable to do a position adjusting motion in the corresponding second opening.
    Type: Application
    Filed: July 12, 2013
    Publication date: January 16, 2014
    Inventors: Chia-Tai CHANG, Chin-Yi TSAI, Chiu-Kuei CHEN, Chen-Chih YU, Chien-Chang LAI, Chin-Tien YANG, Hui-Pin YANG, Keng-Shieng CHANG, Yun-Ru HUANG, Chien-Hung CHEN
  • Patent number: 7823241
    Abstract: A system for cleaning a wafer. At least one first chuck roller is connected to a first roller base and includes a first annular groove. A second roller base opposes the first roller base. At least one second chuck roller is connected to the second roller base and includes a second annular groove. A sensing chuck roller is connected to the second roller base and includes a third annular groove corresponding to the first and second annular grooves. A cleaning member covers the third annular groove. A circumferential edge of the wafer is positioned in the first and second annular grooves and abuts the cleaning member. The first and second chuck rollers rotate the wafer, enabling the circumferential edge thereof to rub against the cleaning member.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: November 2, 2010
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tien-Chen Hu, Chih-Ming Hsieh, Chien-Chang Lai, Wen-Jin Lee, Da-Hsiang Chen
  • Publication number: 20080229526
    Abstract: A system for cleaning a wafer. At least one first chuck roller is connected to a first roller base and includes a first annular groove. A second roller base opposes the first roller base. At least one second chuck roller is connected to the second roller base and includes a second annular groove. A sensing chuck roller is connected to the second roller base and includes a third annular groove corresponding to the first and second annular grooves. A cleaning member covers the third annular groove. A circumferential edge of the wafer is positioned in the first and second annular grooves and abuts the cleaning member. The first and second chuck rollers rotate the wafer, enabling the circumferential edge thereof to rub against the cleaning member.
    Type: Application
    Filed: March 22, 2007
    Publication date: September 25, 2008
    Inventors: Tien-Chen Hu, Chih-Ming Hsieh, Chien-Chang Lai, Wen-Jin Lee, Da-Hsiang Chen
  • Publication number: 20030097826
    Abstract: The present invention provides a sealing device and method for an ink cartridge. First, the ink cartridge and a sealing film are placed in an airtight chamber isolated to the atmosphere. Second, a decompression mechanism is used to draw the air off the airtight chamber until the air pressure in the airtight chamber is reduced to a pre-determined pressure. Finally, a sealing mechanism is used to seal the sealing film onto the ink cartridge.
    Type: Application
    Filed: December 19, 2001
    Publication date: May 29, 2003
    Inventors: Hsien-Li Chiu, Chien-Chang Lai, Kuo-Hua Wu