Abstract: A chip package structure and a method for fabricating the same are provided. The chip package structure includes a conductive substrate, a chip, a molding layer and a package cover. The conductive substrate has first and second board surfaces opposite to each other, and a die-bonding region is defined on the first board surface. The chip is disposed on the first board and located in the die-bonding region, and is electrically connected to the conductive substrate. The molding layer is disposed on the first board surface and surrounds the die-bonding region and the chip. The package cover is disposed on the molding layer, and the package cover, the molding layer and the conductive substrate jointly define an enclosed space surrounding the chip. Two of the conductive substrate, the molding layer and the package cover are connected to each other through a mortise-tenon joint structure.

Abstract: A chip package structure and a method for producing the same are provided. The method at least includes: providing a substrate; forming a mirror ink on the substrate; placing a chip upside-down on the substrate; forming soldering wires coupled with the chip and the substrate; forming a support body on the substrate; providing a package cover adhered to a top surface of the support body; performing a solidifying process in which a solidifying light beam is emitted to the mirror ink and the mirror ink reflects the solidifying light beam to the support body to solidify the support body; performing a packaging process in which a package layer is formed to cover the chip, an outer periphery of the support body, and the package cover; and performing a cutting process in which the package layer and the substrate are cut to form the chip package structure.

Abstract: A chip package structure and a method for producing the same are provided. The method at least includes: providing a substrate; placing a chip upside-down on the substrate; forming bonding wires coupled with the chip and the substrate; forming a support body on the substrate; providing at least one reflecting member at a periphery of the support body; providing a package cover adhered to a top surface of the support body; performing a solidifying process in which a solidifying light beam is emitted to the reflecting member and the reflecting member reflects the solidifying light beam to the support body to solidify the support body; performing a packaging process in which a package layer is formed to cover the chip, an outer periphery of the support body, and the package cover; and performing a cutting process to form the chip package structure.

Abstract: A semiconductor structure includes a dielectric layer over a substrate, a via conductor over the substrate and in the dielectric layer, and a first graphene layer disposed over the via conductor. In some embodiments, a top surface of the via conductor and a top surface of the dielectric layer are level. In some embodiments, the first graphene layer overlaps the via conductor from a top view. In some embodiments, the semiconductor structure further includes a second graphene layer under the via conductor and a third graphene layer between the dielectric layer and the via conductor. In some embodiments, the second graphene layer is between the substrate and the via conductor.

Abstract: A chip packaging structure and a chip packaging method are provided. The chip packaging structure includes a first substrate, an image sensing chip, a supporting member, a second substrate, and an encapsulant. The image sensing chip is disposed on an upper surface of the first substrate, and the image sensing chip has an image sensing region. The supporting member is disposed on an upper surface of the image sensing chip and surrounds the image sensing region. The supporting member is formed by stacking microstructures with each other, so that the supporting member has pores. The second substrate is disposed on an upper surface of the supporting member, and the second substrate, the supporting member, and the image sensing chip define an air cavity. The encapsulant is attached to the upper surface of the first substrate and a side surface of the second substrate and filled into the pores.

Abstract: According to the method, a trench structure is formed in a substrate. LED arrays and driver ICs are located in the corresponding trenches. An insulating layer is formed over the substrate, the LED arrays and the driver ICs. A photolithography process forms an electrical connection structure between the LED arrays and the driver ICs. Then, a die-cutting process cuts out individual units. These units are fixed in a PCB and an electrical connection structure is formed between these units and input/output pins on the PCB.

Abstract: According to the method, a trench structure is formed in a substrate. LED arrays and driver ICs are located in the corresponding trenches. An insulating layer is formed over the substrate, the LED arrays and the driver ICs. A photolithography process forms an electrical connection structure between the LED arrays and the driver ICs. Then, a die-cutting process cuts out individual units. These units are fixed in a PCB and an electrical connection structure is formed between these units and input/output pins on the PCB.

Abstract: The present invention relates to a high-power LED array. The high-power LED array has a printed circuit board (PCB), anodes, cathodes, high-power LED dies, packing materials, and lenses. The PCB has cavities arranged in an array. One anode and one cathode are located in each cavity. The anode and the cathode are correspondingly connected to the anode and cathode in the neighboring cavities. At least one high-power LED die is placed in the cavity and connected to the anode and the cathode in series or in parallel. The cavity is filled with packing material to secure the high-power LED die. Lenses are placed on the cavities to focus light emitted by the high-power LED die.

Abstract: The present invention discloses a structure of light-emitting diode (LED) array module, comprising a substrate, a carrier substrate, a chip, a driving circuit chip, and a plurality of metal lines. The carrier substrate is on top of the substrate, and the top surface of the carrier substrate is divided into a first area and a second area. The chip is attached to the first area of the carrier substrate, and further comprising a light-emitting component array and a pad array. The driving circuit chip is attached to the second area of the carrier substrate, and further comprising a pad array and a pad. The metal lines are for electrically connecting the substrate to the driving circuit chip, and the chip to the driving circuit chip, respectively. The present invention can reduce the manufacturing cost, and improve the yield rate.

Abstract: A light emitting element array module includes a board; a silicon base having a first side, a second side opposite to the first side and adhered to the board, a third side having a first angle with the second side, a fourth side substantially in parallel with the first side and having a second angle with the third side, and a fifth side having a third angle with the fourth side; a chip having a first main surface formed with at least one light emitting element array and at least one pad array, and a second main surface adhered to the board; a driving device adhered to the first side of the silicon base; and a plurality of metal wires for connecting the pad array to the driving device.

Abstract: A light emitting diode (LED) includes a heat dissipation structure characterized by having a heat dissipating fluidic coolant filled in a hermetically sealed housing where at least one LED chip mounted on a metallic substrate is dwelled inside. The heat dissipation structure is configured with a metallic wall erected from the metallic substrate, which is used to hold a transparent cap of the sealed housing in correct position. Furthermore, the erected wall surrounds in proximity with the at least one LED chip, so that the joule heat generated therefrom can be quickly spread out, through the heat dissipating fluidic coolant, to the erected wall, and then diffused along the wall down to the metallic substrate which adjoins with a larger external heat sink for draining the heat, thus preventing the at least one LED from overheating.

Abstract: A smart light emitting diode cluster and system includes a central processing unit (CPU) and a plurality of LED cluster strings, each comprising a plurality of LED cluster connected in series. Each LED cluster includes an LED drive circuit and a plurality of LEDs. The CPU receives external input image signal, and then desired control signal and image data are sent to the LED cluster strings by appropriate processing. The control signal is used to switch the LEDs in the cluster to generate desired image and related color variation. The control signal and image data are transferred to the next LED cluster by the present LED drive circuit. In this manner, the control signal and image data are progressively transferred from the first to the last cluster so that a whole image with color variation can be displayed by all the LEDs in the system.