Patents by Inventor Chien Cheng

Chien Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12389643
    Abstract: Semiconductor structures and the manufacturing method thereof are disclosed. An exemplary semiconductor structure according to the present disclosure includes a substrate having a p-type well or an n-type well, a first base portion over the p-type well, a second base portion over the n-type well, a first plurality of channel members over the first base portion, a second plurality of channel members over the second base portion, an isolation feature disposed between the first base portion and the second base portion, and a deep isolation structure in the substrate disposed below the isolation feature.
    Type: Grant
    Filed: November 27, 2023
    Date of Patent: August 12, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jung-Chien Cheng, Kuo-Cheng Chiang, Shi Ning Ju, Guan-Lin Chen, Chih-Hao Wang, Kuan-Lun Cheng
  • Patent number: 12387023
    Abstract: Disclosed are a chip power consumption analyzer and an analyzation method thereof. The analyzation method includes the following. Design information of a circuit is received. A plurality of clock arriving times of a plurality of circuit cells in the circuit are calculated based on the design information, and a base cell type is set among a plurality of cell types according to the clock arriving times. Base demand current information of the base cell type is established, and a plurality of demand current information of the circuit cells is obtained. A plurality of demand peak currents of a plurality of bump current sources are predicted according to the demand current information and a plurality of position information of the circuit cells.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: August 12, 2025
    Assignees: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sin-Huei Li, Cheng-Hong Tsai, Chien-Cheng Wu, Yen-Chih Chiu, Hu-Cheng Jiang
  • Patent number: 12388062
    Abstract: An electronic package is provided and includes at least one electronic element, at least one first conductive structure and a second conductive structure disposed on one side of a carrier structure with at least one circuit layer, and an encapsulation layer covering the electronic element, the first conductive structure and the second conductive structure, where the first conductive structure is exposed from the encapsulation layer to externally connect required elements according to functional requirements.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: August 12, 2025
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Wen-Jung Tsai, Chih-Hsien Chiu, Chin-Chiang He, Ko-Wei Chang, Chien-Cheng Lin
  • Publication number: 20250242195
    Abstract: A rehabilitation pedal structure for a hospital bed includes a footboard, a bottom plate pivotally mounted on two sides of the footboard, and two pedals elastically and pivotally mounted on the bottom plate. The footboard is provided with a slot. The bottom plate is pivotally mounted in the slot. The two pedals can be received in the slot. Each of the pedals is electrically connected with one of two monitors, a counter, and a microcontroller. The counter performs a counting action. When the two pedals are respectively stepped or pressed by a user's two feet or hands, the two pedals swing relative to the bottom plate respectively, and the two monitors indicate a swinging number of the two pedals respectively, to facilitate detection of exercise capacity and rehabilitation times of the user's two feet or hands.
    Type: Application
    Filed: December 6, 2024
    Publication date: July 31, 2025
    Inventors: Chiung-Mei Liu, Yu-Xuan Lin, Ru-Jun Lin, Wan-Hsuan Lin, Ya-Ping Xu, Pei-Yu Chang, Ying-Chien Cheng
  • Publication number: 20250242889
    Abstract: The present invention relates to a bicycle with a central controlling computer, including a bicycle shifting device for shifting of a bicycle gear, including a shifting control unit for receiving of shifting instructions from the central controlling computer or a further control unit, a power receiving module, such as including an electrical connector, at least one shifting motor, for providing a shifting motion for driving a shifting assembly for actuating of a gear actuator, the shifting assembly being configured to transfer the shifting motion from the shifting motor to the gear actuator, the gear actuator being configured to transfer the shifting motion to the bicycle gear, The shifting control unit, by means of communication with and controlling by the central controlling computer of the bicycle, is configured as a subsystem of the bicycle, and the shifting control unit shifts the bicycle gear on the basis of primary shifting instructions and/or secondary shifting instructions from the main control unit,
    Type: Application
    Filed: March 20, 2023
    Publication date: July 31, 2025
    Inventors: Yu-Lun Chao, Chien-Cheng Kung, Olivier Hébert, David Alexander Enthoven, Ahmet Serhan Kuscuoglu, Chien I Chen
  • Publication number: 20250248073
    Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures over a substrate, and a plurality of second nanostructures adjacent to the first nanostructures. The semiconductor structure includes a protective layer over the first nanostructures, and a first gate structure formed on the first nanostructures. The semiconductor structure includes a second gate structure formed on the second nanostructures. The semiconductor structure includes a first dielectric wall between the first gate structure and the second gate structure, and a top surface of the first dielectric wall is higher than a top surface of the protective layer.
    Type: Application
    Filed: April 23, 2024
    Publication date: July 31, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Chien CHENG, Guan-Lin CHEN, Shi-Ning JU, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Patent number: 12376365
    Abstract: A semiconductor structure includes a first stack of active channel layers and a second stack of active channel layers disposed over a semiconductor substrate, where the second stacking include a dummy channel layer and the first stack is free of any dummy channel layer, a gate structure engaged with the first stack and the second stack, and first S/D features disposed adjacent to the first stack and second S/D features disposed adjacent to the second stack, where the second S/D features overlap with the dummy channel layer.
    Type: Grant
    Filed: June 7, 2024
    Date of Patent: July 29, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Cheng Chiang, Shi Ning Ju, Guan-Lin Chen, Jung-Chien Cheng, Chih-Hao Wang, Kuan-Lun Cheng
  • Patent number: 12366798
    Abstract: A lithography mask including a substrate, a phase shift layer on the substrate and an etch stop layer is provided. The phase shift layer is patterned and the substrate is protected from etching by the etch stop layer. The etch stop layer can be a material that is semi-transmissive to light used in photolithography processes or it can be transmissive to light used in photolithography processes.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: July 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Cheng Chen, Huan-Ling Lee, Ta-Cheng Lien, Chia-Jen Chen, Hsin-Chang Lee
  • Publication number: 20250234578
    Abstract: The present disclosure provides a semiconductor device and a method of forming the same. A method according to one embodiment of the present disclosure includes forming a plurality of semiconductor nanostructures vertically stacked above a substrate, forming a dielectric structure suspended above a topmost one of the semiconductor nanostructures, forming a plurality of inner spacers interleaving the semiconductor nanostructures, forming an epitaxial feature abutting the semiconductor nanostructures, and forming a gate structure wrapping around each of the semiconductor nanostructures and the dielectric structure.
    Type: Application
    Filed: July 5, 2024
    Publication date: July 17, 2025
    Inventors: Jung-Chien Cheng, Guan-Lin Chen, Shi Ning Ju, Kuo-Cheng Chiang, Chih-Hao Wang
  • Patent number: 12356774
    Abstract: A display device includes a circuit substrate, a blocker, a first and second pad located on the circuit substrate, a light-emitting element, and a first and second connecting portion. The blocker is located on the circuit substrate, and has an opposite first and second side and an opposite third and fourth side. The first pad is adjacent to the first side of the blocker. The second pad is adjacent to the second side of the blocker. The light-emitting element is located on the blocker and the first and second pads, and includes a first and second electrode. The first connecting portion is connected to the first electrode and the first pad. The second connecting portion is connected to the second electrode and the second pad. The third and fourth sides of the blocker are aligned with a side of each of the first and second connecting portions.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: July 8, 2025
    Assignee: Au Optronics Corporation
    Inventors: Chung En Peng, Chung-Chan Liu, Chien-Cheng Chang, Sheng-Kai Lin, Hui-Ku Chang
  • Publication number: 20250219617
    Abstract: A crystal resonator includes a crystal plate and an electrode set. The crystal plate includes a first vibration section and a second vibration section arranged along an oscillating direction, and exhibits a thickness shear mode. The electrode set includes a first electrode pair disposed on the first vibration section, and a second electrode pair disposed on the second vibration section. The first electrode pair and the second electrode pair are configured to apply the applied voltages with opposite electrical polarities to the first vibration section and the second vibration section, respectively, which causes the first vibration section and the second vibration section to dynamically deform in the thickness shear mode along the oscillating direction, and do out of phase motion with respect to each other.
    Type: Application
    Filed: August 29, 2024
    Publication date: July 3, 2025
    Inventors: Chien-Cheng YANG, Shing-Tai SONG, Sheng-Shian LI, Po-Cheng HSIEH, Chin-Yu CHANG
  • Publication number: 20250212344
    Abstract: A retractable display device is provided and includes: a shaft housing; a plate housing assembled with the shaft housing; a mandrel module disposed in the shaft housing; a flexible roller blind wound on the mandrel module; a plurality of main support rods disposed in the plate housing; a plurality of left connecting rod groups respectively arranged between any two of the main support rods; a flexible screen wound on the mandrel module; a first constant torque spring constantly providing a first elastic force and disposed on the mandrel module; and a second constant torque spring constantly providing a second elastic force and disposed on the mandrel module.
    Type: Application
    Filed: March 1, 2024
    Publication date: June 26, 2025
    Applicant: SYNCMOLD ENTERPRISE CORP.
    Inventors: Chien-Cheng YEH, Chun-Hao HUANG
  • Publication number: 20250196960
    Abstract: The present invention relates to a bicycle with a central controlling computer including a lock.
    Type: Application
    Filed: March 20, 2023
    Publication date: June 19, 2025
    Inventors: Thijs Faber, Zhan Jun Lin, Mykola Zaitsev, Yu-Lun Chao, David Alexander Enthoven, Olivier Hébert, Ahmet Serhan Kuscuoglu, Chien-Cheng Kung
  • Publication number: 20250190029
    Abstract: The present invention provides a foldable electronic device comprising a central base, panel assemblies, and a scotch yoke synchronization module. The central base includes a base portion and a plate portion. Each panel assembly has a wing member pivoted to the base portion. The scotch yoke synchronization module includes a guide column, a liftable block, crank members, sliding yokes, and sliding pins. The guide column is on the plate portion, and the liftable block moves along it. Each crank member is pivoted to the base portion, with sliding yokes on the liftable block extending widthwise. Sliding pins on the crank members are accommodated in the sliding yokes for back-and-forth movement. When the liftable block moves along the guide column, the sliding pins slide in the yokes, causing the crank members to rotate in opposite directions simultaneously.
    Type: Application
    Filed: September 20, 2024
    Publication date: June 12, 2025
    Inventors: Ching-Hui YEN, Chien-Cheng YEH, Chun-Hao HUANG
  • Publication number: 20250194030
    Abstract: A foldable electronic device is provided and comprises a shell member, at least two pivoting modules and a wire. The shell member includes at least two base portions and a limiting portion. The limiting portion is located between the base portions. The pivoting modules are disposed on the base portions respectively. The wire is sandwiched between the pivoting modules and the shell member and includes at least one through hole. The limiting portion penetrates through the through hole. The wire is able to move integrally in any direction relative to the limiting portion.
    Type: Application
    Filed: October 17, 2024
    Publication date: June 12, 2025
    Inventors: Ching-Hui Yen, Chien-Cheng Yeh, Chun-Hao Huang
  • Publication number: 20250194028
    Abstract: A foldable electronic device is provided and includes a central base, a pivot module, a torque module, two panel bodies, two transmission members, two connecting rods and a flexible screen. The pivot module is disposed on the central base. The torque module is disposed on the pivot module. The panel bodies pivot relative to the central base. The transmission members pivot relative to the pivot module. The connecting rods pivot relative to the panel bodies and the transmission members. The flexible screen is disposed on the panel bodies and includes a bendable area. When the panel bodies are in an unfolded state, the flexible screen is flattened. When the panel bodies are in a folded state, the bendable area is bent.
    Type: Application
    Filed: February 7, 2024
    Publication date: June 12, 2025
    Applicant: SYNCMOLD ENTERPRISE CORP.
    Inventors: Chun-Hao HUANG, Chien-Cheng YEH
  • Publication number: 20250194029
    Abstract: A central housing of a foldable electronic device is provided for pivotally connecting at least one first pivoting module and at least one second pivoting module. The central housing of the foldable electronic device includes at least two base shell units and at least one connecting shell unit. The connecting shell unit is connected to any two of the base shell units, and the base shell units and the connecting shell unit are integrally formed.
    Type: Application
    Filed: October 2, 2024
    Publication date: June 12, 2025
    Inventors: Ching-Hui Yen, Chien-Cheng Yeh, Chun-Hao Huang
  • Publication number: 20250185313
    Abstract: Semiconductor structures and methods for manufacturing the same are provided. The method includes alternately stacking first semiconductor material layers and second semiconductor material layers to form a semiconductor stack over a substrate, and patterning the semiconductor stack to form a first fin structure and a second fin structure. The method further includes forming an isolation structure between the first fin structure and the second fin structure and forming a first dielectric structure. In addition, the first dielectric structure comprises a first material layer and a second material layer formed over the first material layer. The method further includes removing the first semiconductor material layers of the first fin structure and the second fin structure and partially removing the first material layer of the first dielectric structure to form first connecting portions attaching to the second semiconductor material layers.
    Type: Application
    Filed: February 6, 2025
    Publication date: June 5, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Guan-Lin CHEN, Jung-Chien CHENG, Kuo-Cheng CHIANG, Shi-Ning JU, Chih-Hao WANG
  • Patent number: 12322125
    Abstract: A method for registering a two-dimensional image data set with a three-dimensional image data set of a body of interest is discloses herein. The method includes the following steps: obtaining a first spatial parameter of a first registered virtual camera, wherein the first registered virtual camera is positioned corresponding to a first two-dimensional image of the two-dimensional image data set; and adjusting a second spatial parameter of the first unregistered virtual camera with the first spatial parameter of the first registered virtual camera, wherein the first unregistered virtual camera is failed to be positioned corresponding to the first two-dimensional image of the two-dimensional image data set.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: June 3, 2025
    Assignee: REMEX MEDICAL CORP.
    Inventors: Sheng-Fang Lin, Ying-Yi Cheng, Chen-Tai Lin, Shan-Chien Cheng
  • Patent number: 12324229
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The method includes forming a first dielectric feature between first and the second fin structures, wherein each first and second fin structure includes first semiconductor layers and second semiconductor layers alternatingly stacked and in contact with the first dielectric layer. The method also includes removing the second semiconductor layers so that the first semiconductor layers of the first and second fin structures extend laterally from a first side and a second side of the first dielectric feature, respectively, trimming the first dielectric feature so that the first dielectric feature has a reduced thickness on both first and the second sides, and forming a gate electrode layer to surround each of the first semiconductor layers of the first and second fin structures.
    Type: Grant
    Filed: November 19, 2023
    Date of Patent: June 3, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guan-Lin Chen, Kuo-Cheng Chiang, Shi Ning Ju, Jung-Chien Cheng, Chih-Hao Wang, Kuan-Lun Cheng