Abstract: The present application at least describes a method including a step of receiving, at a convolutional neural network (CNN), data over a network from a source. The CNN may include one or more blocks. Each block may include plural layers. The method may include a step of causing, via the CNN in a first layer of the first block, a representation of the received data as a first matrix having M rows and N columns. The M rows and N columns may be greater than or equal to 1. The method may also include a step of processing, via the CNN at the first layer of the first block, the first matrix via a predetermined kernel matrix. The kernel matrix may include M-X rows and N-Y columns. X and Y may be greater than or equal to 1. The method may also include a step of rendering, via the CNN based on the processed first matrix, a second matrix having M-2 rows and N-2 columns.

Abstract: The present application describes systems, methods, devices, and computer program products for convolutional neural networks (CNN) applicable for image processing, image scaling, and computer vision-oriented operations. Various embodiments for image scaling may receive image data corresponding to a first resolution. The image data may have a channel size and a data size. A CNN may be applied to process the image data according to a set of kernels. A first kernel set and a second kernel set may be independently applied to the image data to generate a first output set and a second output set. An interleaved set may be generated from the first output set and the second output set. An output image having a second data size may be generated from the output sets.

Abstract: According to examples, a system for implementing image modification functions via use of variable scanning orders is described. The system may include a processor and a memory storing instructions. The processor, when executing the instructions, may cause the system to partition an image into a plurality of image blocks, identify one or more image blocks of the plurality of image blocks associated with a region of interest (ROI), and scan the one or more image blocks in an image modification order. The processor, when executing the instructions, may then arrange the one or more image blocks according to the image modification order to form a modified image including the region of interest (ROI) and crop the region of interest (ROI) in the modified image to form a new image.

Abstract: The application discloses a semiconductor device and a semiconductor device manufacturing method. The semiconductor device includes: a substrate; a circuit macro on the substrate; a plurality of metal layers over the substrate, wherein the plurality of metal layers include a first power mesh; and a plurality of power switch circuits on the substrate, wherein the power switch circuits selectively couple a power to the first power mesh according to a control signal, and the power switch circuits are arranged in sequence, wherein a control signal output terminal of each first power switch circuit is coupled to a control signal input terminal of a following first power switch circuit, so that the control signal passes through the first power switch circuits sequentially.

Abstract: To prevent arcing discharge of a liquid crystal device. Provided is a liquid crystal device including a liquid crystal layer, a first substrate, a second substrate and an insulating film, wherein the liquid crystal layer is arranged between the first substrate and the second substrate, the first substrate includes electrode 1, the second substrate includes electrode 2, the insulating film is arranged between electrode 1 and electrode 2, and the insulating film is a cured product of a thermosetting polymer composition.

Abstract: The disclosed may include various systems and methods for improving the efficiency and scalability of large-scale systems. For example, the disclosed may include systems and methods for automatic privacy enforcement using privacy-aware infrastructure, scalable general-purpose low cost integer motion search, efficient scaler filter coefficients layout for flexible scaling quality control with limited hardware resources, hardware optimization for power saving with both different codecs enabled, optimizing storage overhead and performance for large distributed data warehouse, mass and volume efficient integration of intersatellite link terminals to a satellite bus, and overcoming retention limit for memory-based distributed database systems.

Abstract: The application discloses a semiconductor device and a semiconductor device manufacturing method. The semiconductor device includes: a substrate; a circuit macro on the substrate; a plurality of metal layers over the substrate, wherein the plurality of metal layers include a first power mesh; and a plurality of power switch circuits on the substrate, wherein the power switch circuits selectively couple a power to the first power mesh according to a control signal, and the power switch circuits are arranged in sequence, wherein a control signal output terminal of each first power switch circuit is coupled to a control signal input terminal of a following first power switch circuit, so that the control signal passes through the first power switch circuits sequentially.

Abstract: A method for compensating voltage drop with additional power mesh and a circuit system thereof are provided. In the method, circuit layout of the system is segmented into one or more regions. A layout overflow analysis is performed on each of the regions. A routing overflow rate for each region is calculated according to a ratio of an area occupied by signal tracks and power tracks of a power mesh to another area provided for whole route tracks in the same region. After considering a ranking of the routing overflow rates of the regions, the widths of metal wires, a predetermined ratio of IR drop compensation for the circuit system, and a degree of electron migration to be improved, the additional power tracks of the power mesh deployed to the circuit system are decided. The additional power tracks of the power mesh can effectively improve the IR drop.

Abstract: A method for performing power mesh optimization with the aid of additional wires and an associated apparatus are provided. The method includes: reading a clock cell definition file to obtain respective basic information of a plurality of clock cells in a circuit design; and according to the respective basic information of the plurality of clock cells, executing a power mesh optimization procedure, including: regarding any type of clock cells in multiple types of clock cells within the plurality of clock cells, classifying the clock cells into a plurality of sub-types according to respective sizes of the type of clock cells; and performing power mesh enhancement on respective clock cells of a set of sub-types within the plurality of sub-types, to add a set of additional wires crossing a set of original wires in an original power mesh at each clock cell of any sub-type of the set of sub-types.

Abstract: A method for performing power mesh optimization with the aid of additional wires and an associated apparatus are provided. The method includes: reading a clock cell definition file to obtain respective basic information of a plurality of clock cells in a circuit design; and according to the respective basic information of the plurality of clock cells, executing a power mesh optimization procedure, including: regarding any type of clock cells in multiple types of clock cells within the plurality of clock cells, classifying the clock cells into a plurality of sub-types according to respective sizes of the type of clock cells; and performing power mesh enhancement on respective clock cells of a set of sub-types within the plurality of sub-types, to add a set of additional wires crossing a set of original wires in an original power mesh at each clock cell of any sub-type of the set of sub-types.

Abstract: A method of using a simulation software to generate a circuit layout, the method comprising: (A) determining a plurality of blocks on a circuit board, wherein each block of the plurality of blocks includes an operating space and a reserved space; (B) determining a size of the reserved space of each block of the plurality of blocks according to at least one specific condition;(C) determining whether to adjust the size of the reserved space of each block of the plurality of blocks according to at least one determining condition; and (D) when it is determined not to adjust the size of the reserved space in step (C), generating the circuit layout according to the size of the reserved space of each block of the plurality of blocks determined in step (B).

Abstract: A method of using simulation software to generate circuit layout includes: (A) determining a plurality of blocks on a circuit board, wherein each block includes an operating space and a reserved space; (B) determining a size of the reserved space of each of the blocks according to at least one specific condition; (C) determining whether to adjust the size of the reserved space of the blocks according to at least one determining condition; and (D) when it is determined not to adjust the size of the reserved space in step (C), generating the circuit layout according to the size of the reserved space of the blocks determined in step (B).

Abstract: A circuit structure is electrically connected to a power source. The circuit structure includes a first circuit module and a second circuit module. The first circuit module includes a first module power switch and a plurality of circuits. The first module power switch is electrically connected to the power source. The first circuit module has a first module current. The second circuit module includes a second module power switch and a plurality of circuits. The second power switch is electrically connected to the power source. The second circuit module has a second module current. A turn-on order of the first module power switch and the second power switch is determined based on the first module current and the second module current.

Abstract: A circuit structure is electrically connected to a power source. The circuit structure includes a first circuit module and a second circuit module. The first circuit module includes a first module power switch and a plurality of circuits. The first module power switch is electrically connected to the power source. The first circuit module has a first module current. The second circuit module includes a second module power switch and a plurality of circuits. The second power switch is electrically connected to the power source. The second circuit module has a second module current. A turn-on order of the first module power switch and the second power switch is determined based on the first module current and the second module current.

Abstract: To prevent arcing discharge of a liquid crystal device. Provided is a liquid crystal device including a liquid crystal layer, a first substrate, a second substrate and an insulating film, wherein the liquid crystal layer is arranged between the first substrate and the second substrate, the first substrate includes electrode 1, the second substrate includes electrode 2, the insulating film is arranged between electrode 1 and electrode 2, and the insulating film is a cured product of a thermosetting polymer composition.

Abstract: An intelligent teaching and tutoring test method is provided with a remote learning online test mode, a remote learning test paper test mode, a classroom teaching online test mode, and a classroom teaching test paper test mode. Based on the diversified data input methods and intelligent data analyzing process offered by an intelligent teaching and tutoring test system, the invention is a proprietary teaching and tutoring test method for different learners according to their differentiated individual learning situations so as to substantially enhance the learning efficiency of the learners.

Abstract: An interactive learning management method includes abilities to automatically establish group settings on the learning communication mobile application based on the user identities, and to conduct real-time information transmission of class announcements, test paper scores, tutor comments and replies etc, to carry out learning interactions with the teacher by recording video clips of questions and answers, and to download mobile applications for learning via the Internet. The method provides a realization for transmission of learning information and archive photos by the users on the mobile device end through the learning communication mobile application and for downloading remote learning-oriented mobile applications for use, so that users can conduct real-time information notifications or learning through the mobile applications oriented to specific courses on the mobile device without limit of time and place. As a result, learning efficiency can be greatly increased.

Abstract: An intelligent teaching and tutoring test method is provided with a remote learning online test mode, a remote learning test paper test mode, a classroom teaching online test mode, and a classroom teaching test paper test mode. Based on the diversified data input methods and intelligent data analyzing process offered by an intelligent teaching and tutoring test system, the invention is a proprietary teaching and tutoring test method for different learners according to their differentiated individual learning situations so as to substantially enhance the learning efficiency of the learners.

Abstract: An e-learning method is provided with allowing a teacher to use remote data processing device to communicate with users over the Internet; allowing the teacher and the users to access an online teaching database over the Internet by using the remote data processing device respectively wherein the online teaching database includes a curriculum server, an examination server, a user records server, and an academic server; allowing the teacher to access the curriculum server by using the remote data processing device; allowing the teacher to access a curriculum or a video from the curriculum server for teaching; allowing the users to access the curriculum server by using the remote data processing device; allowing the users to download the curriculum or the video; allowing the teacher to communicate with the users; and allowing the teacher to designate a user to access the examination server by using the remote data processing device.

Abstract: The invention provides a label-free sensor that includes a substrate, a first electrode formed on the substrate, a second electrode formed on the substrate and spaced away from the first electrode, and a semiconductor layer formed on the substrate and being in contact with the first electrode and the second electrode. The semiconductor layer has a plurality of probe groups bonded to the semiconductor layer by functionalization, for sensing a coupling-specific substance having bonding specificity with the probe groups. The semiconductor layer is bonded with the probe groups, and the detection of detected object is performed in an instant, quick, rapid, and sensitive manner by measuring variation in electric current, avoiding the use of fluorescent reading equipment for reading fluorescent signals.