Abstract: A semiconductor memory device and a manufacturing method thereof are provided in the present invention. An under-cut structure is formed at an edge of a bit line contact opening in the process of forming the bit line contact opening for avoiding short problems caused by alignment shifting, and the process window of the process of forming the bit line contact opening may be improved accordingly.

Abstract: A method for removing a patterned negative photoresist from a substrate includes: (a) placing the substrate on lift pins of a wafer chuck; (b) retracting the lift pins to place the substrate in a pin-down position and concurrently heating the substrate to a first temperature not exceeding 100° C.; (c) raising the lift pins to place the substrate in a pin-up position; (d) generating a plasma from a gas comprising NH3; and (e) exposing the substrate to the plasma in the pin-up position and the pin-down position alternatively to selectively remove the negative photoresist from the substrate.

Abstract: A method of forming semiconductor memory device including following steps. Firstly, a substrate having a memory cell region and a peripheral region is provided, and a first semiconductor layer is formed on the substrate within the periphery region. Next, an insulating layer and a second semiconductor layer are formed on the substrate, and the second semiconductor layer covers the substrate, the first semiconductor layer and the insulating layer. Then, a sacrificial layer is formed on the second semiconductor layer, wherein top surfaces of the sacrificial layer within the memory cell region and the periphery region are coplanar. Following these, a removing process is performed to remove the sacrificial layer, the second semiconductor layer and the insulating layer, to expose the first semiconductor layer. After that, a top surface of the first semiconductor layer is leveled with a top surface of the second semiconductor layer.

Abstract: A semiconductor device and method of manufacturing the same is provided in the present invention. The method includes the step of forming first mask patterns on a substrate, wherein the first mask patterns extend in a second direction and are spaced apart in a first direction to expose a portion of first insulating layer, removing the exposed first insulating layer to form multiple recesses in the first insulating layer, performing a surface treatment to the recess surface, filling up the recesses with a second insulating layer and exposing a portion of the first insulating layer, removing the exposed first insulating layer to form a mesh-type isolation structure, and forming storage node contact plugs in the openings of mesh-type isolation structure.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region and a periphery region; forming a first buried gate and a second buried gate in the substrate on the memory region; forming a first silicon layer on the substrate on the periphery region; forming a stacked layer on the first silicon layer; forming an epitaxial layer on the substrate between the first buried gate and the second buried gate; and forming a second silicon layer on the epitaxial layer on the memory region and the stacked layer on the periphery region.

Abstract: A method of fabricating an isolation structure is provided. A first oxide layer and a first, second, and third hard mask layers are formed on a substrate. A patterned third hard mask layer is formed. Second oxide layers are formed on sidewalls of the patterned third hard mask layer and a fourth hard mask layer is formed between the second oxide layers. The second oxide layers and the second hard mask layer are removed using the patterned third hard mask layer and the fourth hard mask layer as a mask, to form a patterned second hard mask layer. The patterned third hard mask layer and the fourth hard mask layer are removed. A portion of the patterned second hard mask layer is removed to form trench patterns. A patterned first hard mask layer and first oxide layer, and trenches located in the substrate are defined. An isolation material is formed.

Abstract: The present invention pertains to a patterning method. By taking advantage of the etching loading effect due to different pattern densities in the memory cell region and the peripheral region, the first hard mask is not masked when anisotropically etching the first hard mask within the memory cell region.

Abstract: A manufacturing method of an epitaxial contact structure in a semiconductor memory device includes the following steps. A recess is formed in a semiconductor substrate by an etching process. An etching defect is formed in the recess by the etching process. An oxidation process is performed after the etching process. An oxide layer is formed in the recess by the oxidation process, and the etching defect is encompassed by the oxide layer. A cleaning process is performed after the oxidation process. The oxide layer and the etching defect encompassed by the oxide layer are removed by the cleaning process. An epitaxial growth process is performed to form an epitaxial contact structure in the recess after the cleaning process.

Abstract: A semiconductor memory device and a method of forming the same, the semiconductor memory device includes a plurality of active areas, a shallow trench isolation, a plurality of trenches and a plurality of gates. The active areas are defined on a semiconductor substrate, and surrounded by the shallow trench isolation. The trenches are disposed in the semiconductor substrate, penetrating through the active areas and the shallow trench isolation, wherein each of the trenches includes a bottom surface and a saddle portion protruded therefrom in each active areas. The gates are disposed in the trenches respectively.

Abstract: A manufacturing method of a semiconductor storage device includes forming a plurality of bit line structures on a semiconductor substrate and forming a plurality of storage node contacts disposed between the bit line structures. The method of forming the storage node contacts includes forming a plurality of conductive patterns on the semiconductor substrate followed by performing an etching back process to the conductive patterns for decreasing a thickness of the conductive patterns. The manufacturing method further includes forming a plurality of isolation patterns between the conductive patterns, wherein the isolation patterns are formed after forming the plurality of conductive patterns and before the etching back process. According to the present invention, the storage node contacts are formed by first forming the conductive patterns and then forming the isolation patterns between the conductive patterns, so as to simplify manufacturing process and increase process yield.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region and a periphery region; forming a first buried gate and a second buried gate in the substrate on the memory region; forming a first silicon layer on the substrate on the periphery region; forming a stacked layer on the first silicon layer; forming an epitaxial layer on the substrate between the first buried gate and the second buried gate; and forming a second silicon layer on the epitaxial layer on the memory region and the stacked layer on the periphery region.

Abstract: A method of forming semiconductor memory device including following steps. Firstly, a substrate having a memory cell region and a peripheral region is provided, and a first semiconductor layer is formed on the substrate within the periphery region. Next, an insulating layer and a second semiconductor layer are formed on the substrate, and the second semiconductor layer covers the substrate, the first semiconductor layer and the insulating layer. Then, a sacrificial layer is formed on the second semiconductor layer, wherein top surfaces of the sacrificial layer within the memory cell region and the periphery region are coplanar. Following these, a removing process is performed to remove the sacrificial layer, the second semiconductor layer and the insulating layer, to expose the first semiconductor layer. After that, a top surface of the first semiconductor layer is leveled with a top surface of the second semiconductor layer.

Abstract: A semiconductor memory device and a manufacturing method thereof are provided in the present invention. An under-cut structure is formed at an edge of a bit line contact opening in the process of forming the bit line contact opening for avoiding short problems caused by alignment shifting, and the process window of the process of forming the bit line contact opening may be improved accordingly.

Abstract: A manufacturing method of a semiconductor storage device includes forming a plurality of bit line structures on a semiconductor substrate and forming a plurality of storage node contacts disposed between the bit line structures. The method of forming the storage node contacts includes forming a plurality of conductive patterns on the semiconductor substrate followed by performing an etching back process to the conductive patterns for decreasing a thickness of the conductive patterns. The manufacturing method further includes forming a plurality of isolation patterns between the conductive patterns, wherein the isolation patterns are formed after forming the plurality of conductive patterns and before the etching back process. According to the present invention, the storage node contacts are formed by first forming the conductive patterns and then forming the isolation patterns between the conductive patterns, so as to simplify manufacturing process and increase process yield.

Abstract: A method of fabricating an isolation structure is provided. A first oxide layer and a first, second, and third hard mask layers are formed on a substrate. A patterned third hard mask layer is formed. Second oxide layers are formed on sidewalls of the patterned third hard mask layer and a fourth hard mask layer is formed between the second oxide layers. The second oxide layers and the second hard mask layer are removed using the patterned third hard mask layer and the fourth hard mask layer as a mask, to form a patterned second hard mask layer. The patterned third hard mask layer and the fourth hard mask layer are removed. A portion of the patterned second hard mask layer is removed to form trench patterns. A patterned first hard mask layer and first oxide layer, and trenches located in the substrate are defined. An isolation material is formed.