Abstract: A method for adjusting a projection parameter and a projection system are disclosed. In the projection system, a processor is configured to drive multiple projectors to project multiple projection images respectively and obtain a full projection range through calculation, select a target area from at least one overlapping area included in the full projection range and obtain a target projection parameter value of the target area, obtain multiple intersection points of the overlapping area on a boundary of the full projection range, define connecting lines between a center point of the target area and the intersection points as dividing lines to divide the full projection range into multiple sub-areas, respectively adjust a projection parameter value of each of the sub-areas according to the target projection parameter value of the target area, and perform projection through the corresponding projector based on the adjusted projection parameter value of each of the sub-areas.

Abstract: A device includes a bottom transistor, a top transistor, and an epitaxial isolation structure. The bottom transistor includes a first channel layer, first source/drain epitaxial structures, and a first gate structure. The first source/drain epitaxial structures are on opposite sides of the first channel layer. The first gate structure is around the first channel layer. The top transistor is over the bottom transistor and includes a second channel layer, second source/drain epitaxial structures, and a second gate structure. The second source/drain epitaxial structures are on opposite sides of the second channel layer. The second gate structure is around the second channel layer. The epitaxial isolation structure is between and in contact with one of the first source/drain epitaxial structures and one of the second source/drain epitaxial structures, such that the one of the first source/drain epitaxial structures is electrically isolated from the one of the second source/drain epitaxial structures.

Abstract: A method for adjusting a projection boundary and a projection system are provided. Multiple imaging apparatuses corresponding to multiple projection apparatuses are driven, and each imaging apparatus obtains a corresponding captured image by capturing projected image projected by corresponding one projection apparatus and surrounding area of the projected image. All captured images are displayed on a display, and a main bounding box corresponding to each projected image and a reference bounding box corresponding to the surrounding area are displayed on each captured image. The main bounding box of each captured image is independently adjusted relative to the reference bounding box to obtain an adjusted main bounding box. A full image boundary is calculated based on the respective adjusted main bounding boxes. The projection apparatuses are driven to project an adjusted full image based on the full image boundary.

Abstract: A short detection circuit includes a voltage divider circuit, for generating, according to a bottom voltage of one or more light-emitting diode strings, a divided voltage less than the bottom voltage. Additionally, the short detection circuit includes a voltage clamp circuit, coupled to the voltage divider circuit, for clamping the divided voltage, and a comparator, coupled to the voltage divider circuit, for comparing the divided voltage and a reference voltage, to decide whether a short circuit occurs in the one or more light-emitting diode strings according to a result of the comparison.

Abstract: A light-emitting diode driving device includes a light-emitting diode driving chip, for driving the one or more light-emitting diode strings according to a feedback voltage associated with the one or more light-emitting diode strings, and a voltage limiter, having a terminal coupled to the light-emitting diode driving chip and another terminal coupleable to the one or more light-emitting diode strings, for generating the feedback voltage for provision to the light-emitting diode driving chip according to a bottom voltage of the one or more light-emitting diode strings, and limiting the feedback voltage not to exceed a preset level; wherein the voltage limiter starts limiting the feedback voltage to substantially the preset level when the bottom voltage rises to the preset level.

Abstract: An integrated backlight driving chip for driving a light-emitting diode backlight module includes a scaler circuit and a backlight driving circuit. The scaler circuit includes a digital control unit for generating a digital control signal, and a variable reference voltage generation unit for generating a reference voltage. The backlight driving circuit is coupled to the digital control unit, the variable reference voltage generation unit, and the LED backlight module, for generating a backlight driving signal according to the digital control signal and the reference voltage so as to drive the LED backlight module.

Abstract: A light-emitting diode driving device includes a light-emitting diode driving chip, for driving the one or more light-emitting diode strings according to a feedback voltage associated with the one or more light-emitting diode strings, and a voltage limiter, having a terminal coupled to the light-emitting diode driving chip and another terminal coupleable to the one or more light-emitting diode strings, for generating the feedback voltage for provision to the light-emitting diode driving chip according to a bottom voltage of the one or more light-emitting diode strings, and limiting the feedback voltage not to exceed a preset level.

Abstract: An image processing circuit and a light illumination module are provided. The light illumination module has an integrated circuit and a plurality of light emitting diode (LED) strings connected in parallel. The integrated circuit could be the image processing circuit. Each of the LED strings has a plurality of LEDs connected in series. The integrated circuit has a driving circuit coupled to the LED strings. The driving circuit supplies a driving voltage to first ends of the LED strings to drive the LED strings. The driving circuit is also configured to maintain a voltage value of the driving voltage obtained while all of the strings of the light emitting diodes are turned on, until all of the LED strings are turned on again. Accordingly, the interference of the LED strings is decreased, and the LED strings operate more stably.

Abstract: In a normal mode, the power supply is fed back in a close loop, but in a power saving mode, the power supply is fed back in an open loop. When it is detected that the power supply is continuously fed back in the open loop and in a substantially zero output status, the power supply circuit enters a power down status. If the back-stage circuit needs power supply again, then the feedback is switched to the close loop and the power supply circuit enters the normal mode.

Abstract: An image processing circuit and a light illumination module are provided. The light illumination module has an integrated circuit and a plurality of light emitting diode (LED) strings connected in parallel. The integrated circuit could be the image processing circuit. Each of the LED strings has a plurality of LEDs connected in series. The integrated circuit has a driving circuit coupled to the LED strings. The driving circuit supplies a driving voltage to first ends of the LED strings to drive the LED strings. The driving circuit is also configured to maintain a voltage value of the driving voltage obtained while all of the strings of the light emitting diodes are turned on, until all of the LED strings are turned on again. Accordingly, the interference of the LED strings is decreased, and the LED strings operate more stably.

Abstract: A dual-port input equalizer includes a control unit for generating a first control signal and a second control signal according to a selection signal, a first equalizer for receiving a first and second differential voltage for equalization according to the first control signal and the second control signal, which the first equalizer includes a first transistor, a second transistor, an passive loading portion, and a first zero-point generation circuit, a second equalizer for receiving a third and fourth differential voltage for equalization according to the first control signal and the second control signal, which the second equalizer includes a third transistor and a fourth transistor, which the drain of the first transistor, the second transistor, third transistor, and the fourth transistor coupled to the passive loading portion, and the source of the first transistor, the second transistor, third transistor, and the fourth transistor coupled to the first zero-point generation circuit.

Abstract: A light-emitting diode driving device includes a light-emitting diode driving chip, for driving the one or more light-emitting diode strings according to a feedback voltage associated with the one or more light-emitting diode strings, and a voltage limiter, having a terminal coupled to the light-emitting diode driving chip and another terminal coupleable to the one or more light-emitting diode strings, for generating the feedback voltage for provision to the light-emitting diode driving chip according to a bottom voltage of the one or more light-emitting diode strings, and limiting the feedback voltage not to exceed a preset level.

Abstract: An integrated backlight driving chip for driving a light-emitting diode backlight module includes a scaler circuit and a backlight driving circuit. The scaler circuit includes a digital control unit for generating a digital control signal, and a variable reference voltage generation unit for generating a reference voltage. The backlight driving circuit is coupled to the digital control unit, the variable reference voltage generation unit, and the LED backlight module, for generating a backlight driving signal according to the digital control signal and the reference voltage so as to drive the LED backlight module.

Abstract: A short detection circuit includes a voltage divider circuit, for generating, according to a bottom voltage of one or more light-emitting diode strings, a divided voltage less than the bottom voltage. Additionally, the short detection circuit includes a voltage clamp circuit, coupled to the voltage divider circuit, for clamping the divided voltage, and a comparator, coupled to the voltage divider circuit, for comparing the divided voltage and a reference voltage, to decide whether a short circuit occurs in the one or more light-emitting diode strings according to a result of the comparison.

Abstract: A dual-port input equalizer includes a control unit for generating a first control signal and a second control signal according to a selection signal, a first equalizer for receiving a first and second differential voltage for equalization according to the first control signal and the second control signal, which the first equalizer includes a first transistor, a second transistor, an passive loading portion, and a first zero-point generation circuit, a second equalizer for receiving a third and fourth differential voltage for equalization according to the first control signal and the second control signal, which the second equalizer includes a third transistor and a fourth transistor, which the drain of the first transistor, the second transistor, third transistor, and the fourth transistor coupled to the passive loading portion, and the source of the first transistor, the second transistor, third transistor, and the fourth transistor coupled to the first zero-point generation circuit.

Abstract: In a normal mode, the power supply is fed back in a close loop, but in a power saving mode, the power supply is fed back in an open loop. When it is detected that the power supply is continuously fed back in the open loop and in a substantially zero output status, the power supply circuit enters a power down status. If the back-stage circuit needs power supply again, then the feedback is switched to the close loop and the power supply circuit enters the normal mode.

Abstract: A differential-signal output circuit for a timing controller of a display device includes a conversion circuit, a pre-charging circuit and a timing generator. The conversion circuit is used for receiving a differential signal and outputting a current to a load circuit according to polarity of the differential signal. The pre-charging circuit is coupled to a first output end and a second output end of the conversion circuit or is coupled to a first power driving end and a power second driving end of the conversion circuit. The pre-charging circuit is used for pre-charging the load according to a control signal. The timing generator is used for generating the differential signal and a control signal according to display data.

Abstract: A low power differential signaling transmitter includes a switchable current source apparatus and a differential signaling generator coupled to the switchable current source apparatus. The switchable current source apparatus receives a first input voltage and a second input voltage, and generates a plurality of reference currents according to the first input voltage and the second input voltage. The differential signaling generator includes a plurality of first transistors, a plurality of second transistors, a first output voltage terminal and a second output voltage terminal. The on or off states of the first transistors and the second transistors are controlled by the reference currents. The first output voltage terminal outputs a first output voltage, and the second output voltage terminal outputs a second output voltage. The first output voltage and the second output voltage are determined according to the on or off states of the first and second transistors.

Abstract: The exemplary examples of the present invention provide a transmission interface and method thereof for reducing power consumption and electromagnetic interference. The transmission interface is used in the Liquid Crystal Display (LCD), and the LCD has x source drivers. The ith source driver processes ki transmission signals, wherein ki is a natural number larger than 1, x is a natural number, and i is an integer from 1 to x. The transmission interface includes an encoding device. The encoding device receives ( ? i = 1 x ? ? k i ) image signals.

Abstract: A synchronization signal extraction device includes a signal reception terminal for receiving a composite video signal, a threshold voltage adjuster coupled to the signal reception terminal for adjusting a threshold voltage to a ratio of a first characteristic level and a second characteristic level of the composite video signal according to the first characteristic level and the second characteristic level, a slicer coupled to the signal reception terminal and the threshold voltage adjuster for slicing the composite video signal to extract a synchronization signal in the composite video signal, and a signal output terminal coupled to the slicer for outputting the extracted synchronization signal.