Patents by Inventor Chien-Chih Wang
Chien-Chih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12218279Abstract: An optoelectronic device includes a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; a first insulating layer on the second semiconductor layer and including a plurality of first openings exposing the first semiconductor layer, wherein the first openings include a first group and a second group; a third electrode on the first insulating layer and including a first extended portion and a second extended portion, wherein the first extended portion and the second extended portion are respectively electrically connected to the first semiconductor layer through the first group of the first openings and the second group of the first openings, and wherein the number of the first group of the first openings is different from the number of the second group of the first openings; and a plurality of fourth electrodes on the second insulating layer and electrically connected to the second semiconductor layer, wherein in aType: GrantFiled: January 11, 2024Date of Patent: February 4, 2025Assignee: EPISTAR CORPORATIONInventors: Chao-Hsing Chen, Jia-Kuen Wang, Chien-Chih Liao, Tzu-Yao Tseng, Tsun-Kai Ko, Chien-Fu Shen
-
Publication number: 20240152194Abstract: A power consumption reduction method can include defining y operation scenarios according to x types of extracted information, generating z power profiles each used for controlling power provided to a subset of a plurality of processors, assigning the z power profiles to the y operation scenarios in a machine learning model, collecting to-be-evaluated information by the plurality of processors, comparing the to-be-evaluated information with the x types of extracted information to find a most similar type of extracted information, using the machine learning model to select an optimal power profile from the z power profiles according to the most similar type of extracted information, and applying the optimal power profile to control the power provided to the subset of the plurality of processors. The subset of the plurality of processors are of the same type of processor. x, y and z can be an integer larger than zero.Type: ApplicationFiled: August 18, 2023Publication date: May 9, 2024Applicant: MEDIATEK INC.Inventors: Wen-Wen Hsieh, Ying-Yi Teng, Chien-Chih Wang
-
Publication number: 20240119200Abstract: A method of building a characteristic model includes: acquiring raw electrical data from a measurement system outside one or more processing units; acquiring operational state-related data from an information collector inside the one or more processing units; performing a data annealing process on the raw electrical data and the operational state-related data to obtain and purified electrical data and purified operational state-related data; and performing a machine learning (ML)-based process to build the characteristic model based on the purified electrical data and the purified operational state-related data.Type: ApplicationFiled: October 3, 2023Publication date: April 11, 2024Applicant: MEDIATEK INC.Inventors: Yu-Jen Chen, Chien-Chih Wang, Wen-Wen Hsieh, Ying-Yi Teng
-
Patent number: 11941741Abstract: A graphics system includes an effect engine and a graphics pipeline. The graphics pipeline performs pipeline operations on graphical objects in a frame. The graphics pipeline includes at least a fragment shader stage. An application programming interface (API) provides an instruction that specifies a subset of the graphical objects in the frame for the effect engine to execute. When detecting the instruction, the graphics pipeline invokes the effect engine to perform a predefined set of graphics operations on the subset of the graphical objects in the frame. The predefined set of graphics operations has a higher computational complexity than the pipeline operations.Type: GrantFiled: March 30, 2022Date of Patent: March 26, 2024Assignee: MediaTek Inc.Inventors: Chien-Chih Wang, Ying-Chieh Chen
-
Publication number: 20220222885Abstract: A graphics system includes an effect engine and a graphics pipeline. The graphics pipeline performs pipeline operations on graphical objects in a frame. The graphics pipeline includes at least a fragment shader stage. An application programming interface (API) provides an instruction that specifies a subset of the graphical objects in the frame for the effect engine to execute. When detecting the instruction, the graphics pipeline invokes the effect engine to perform a predefined set of graphics operations on the subset of the graphical objects in the frame. The predefined set of graphics operations has a higher computational complexity than the pipeline operations.Type: ApplicationFiled: March 30, 2022Publication date: July 14, 2022Inventors: Chien-Chih Wang, Ying-Chieh Chen
-
Patent number: 11321901Abstract: A graphics system includes an effect engine, which executes a predefined set of graphics operations having a higher computational complexity than pipeline operations. The graphics system further includes a graphics pipeline operative to perform the pipeline operations on graphical objects in a frame. The effect engine is operative to execute the predefined set of graphics operations on a subset of the graphical objects in the frame. One or more buffers are operative to receive pixels of the frame for display. The frame includes the graphical objects operated on by the graphics pipeline and the subset of the graphical objects operated on by the effect engine.Type: GrantFiled: February 13, 2020Date of Patent: May 3, 2022Assignee: MediaTek Inc.Inventors: Chien-Chih Wang, Ying-Chieh Chen
-
Publication number: 20210256753Abstract: A graphics system includes an effect engine, which executes a predefined set of graphics operations having a higher computational complexity than pipeline operations. The graphics system further includes a graphics pipeline operative to perform the pipeline operations on graphical objects in a frame. The effect engine is operative to execute the predefined set of graphics operations on a subset of the graphical objects in the frame. One or more buffers are operative to receive pixels of the frame for display. The frame includes the graphical objects operated on by the graphics pipeline and the subset of the graphical objects operated on by the effect engine.Type: ApplicationFiled: February 13, 2020Publication date: August 19, 2021Inventors: Chien-Chih Wang, Ying-Chieh Chen
-
Patent number: 10985168Abstract: A semiconductor memory device includes a substrate, at least one floating gate electrode, an interlayer dielectric layer, an interconnection structure, an etching stop layer, a conductive structure, and an opening. The floating gate electrode is disposed on the substrate. The interlayer dielectric layer is disposed on the floating gate electrode. The interconnection structure is disposed in the interlayer dielectric layer. The etching stop layer is disposed on the interlayer dielectric layer. The conductive structure penetrates the etching stop layer and is electrically connected with the interconnection structure. The opening penetrates the etching stop layer and overlaps at least a part of the floating gate electrode in a thickness direction of the substrate.Type: GrantFiled: October 1, 2019Date of Patent: April 20, 2021Assignee: United Semiconductor (Xiamen) Co., Ltd.Inventors: Jung-Chun Yen, Chien-Chih Wang, Guang Yang, Jiawei Lyu, Linshan Yuan, Wen Yi Tan
-
Publication number: 20210066322Abstract: A semiconductor memory device includes a substrate, at least one floating gate electrode, an interlayer dielectric layer, an interconnection structure, an etching stop layer, a conductive structure, and an opening. The floating gate electrode is disposed on the substrate. The interlayer dielectric layer is disposed on the floating gate electrode. The interconnection structure is disposed in the interlayer dielectric layer. The etching stop layer is disposed on the interlayer dielectric layer. The conductive structure penetrates the etching stop layer and is electrically connected with the interconnection structure. The opening penetrates the etching stop layer and overlaps at least a part of the floating gate electrode in a thickness direction of the substrate.Type: ApplicationFiled: October 1, 2019Publication date: March 4, 2021Inventors: Jung-Chun Yen, Chien-Chih Wang, Guang Yang, JIAWEI LYU, LINSHAN YUAN, WEN YI TAN
-
Patent number: 10210046Abstract: A computer system includes a memory unit and a processing unit. The memory unit is configured to store a default setting value with an image file form. The processing unit is electrically connected to the memory unit, and configured to read the default setting value with the image file form from the memory unit. When the computer system is unable to be activated, the processing unit is configured to trigger the computer system to activate a safe mode of a basic input/output system, and to compare the default setting value with a system setting value of the computer system to generate a comparison result, so as to adjust and reactivate the computer system according to the comparison result.Type: GrantFiled: March 24, 2017Date of Patent: February 19, 2019Assignees: Inventec (Pudong) Technology Corporation, INVENTEC CORPORATIONInventors: Chien-Chih Wang, Yung-Sheng Chiang
-
Publication number: 20180150358Abstract: A computer system includes a memory unit and a processing unit. The memory unit is configured to store a default setting value with an image file form. The processing unit is electrically connected to the memory unit, and configured to read the default setting value with the image file form from the memory unit. When the computer system is unable to be activated, the processing unit is configured to trigger the computer system to activate a safe mode of a basic input/output system, and to compare the default setting value with a system setting value of the computer system to generate a comparison result, so as to adjust and reactivate the computer system according to the comparison result.Type: ApplicationFiled: March 24, 2017Publication date: May 31, 2018Inventors: Chien-Chih WANG, Yung-Sheng CHIANG
-
Patent number: 8802358Abstract: A method of forming an alignment film is provided. A photosensitive polymer material is provided, wherein the photosensitive polymer material defines a first pixel area and a second pixel area respectively defining a first sub-pixel area and the second sub-pixel area. In a first exposure, the photosensitive polymer material is irradiate by a first exposure light and a second exposure light to form a first alignment portion and a second alignment portion with different alignment directions in the first sub-pixel of the first pixel area and the second sub-pixel of the second pixel area respectively. In a second exposure, the photosensitive polymer material is irradiated with the first exposure light and the second exposure light to form a third alignment portion and a fourth alignment portion with different alignment directions in the first sub-pixel of the second pixel area and the second sub-pixel of the first pixel area respectively.Type: GrantFiled: November 6, 2012Date of Patent: August 12, 2014Assignees: Innocom Technology (Shenzhen) Co., Ltd., Innolux CorporationInventors: Yao-Jen Ou, Han-Lang Lee, Chien-Chih Wang, Hung-I Tseng
-
Patent number: 8736787Abstract: A liquid crystal panel module, a backlight module and a liquid crystal display (LCD) are provided. The liquid crystal panel module includes a liquid crystal panel and a diffraction grating layer. The liquid crystal panel has a plurality of pixels. The diffraction grating layer is disposed on the liquid crystal panel, and a maximum period of a grating of the diffraction grating layer is smaller than 1/10 of a size of the pixels. The backlight module includes a light guide plate, a light emitting element and a diffraction grating film. A light provided by the light emitting element emits from a light emitting surface of the light guide plate and is bended towards the light emitting element after passing through the diffraction grating film. The liquid crystal panel module and the backlight module can be applied to the LCD together or individually.Type: GrantFiled: January 6, 2011Date of Patent: May 27, 2014Assignees: Chimei Innolux Corporation, Chi Mei Corporation, Klaser Technology, Inc.Inventors: Wang-Yang Li, Hung-Yu Lin, Hsin-Wen Chang, Yi-Pan Liang, Chien-Chih Wang, Wai-Hon Lee, Hua-Fang Tsai
-
Publication number: 20110187964Abstract: A liquid crystal panel module, a backlight module and a liquid crystal display (LCD) are provided. The liquid crystal panel module includes a liquid crystal panel and a diffraction grating layer. The liquid crystal panel has a plurality of pixels. The diffraction grating layer is disposed on the liquid crystal panel, and a maximum period of a grating of the diffraction grating layer is smaller than 1/10 of a size of the pixels. The backlight module includes a light guide plate, a light emitting element and a diffraction grating film. A light provided by the light emitting element emits from a light emitting surface of the light guide plate and is bended towards the light emitting element after passing through the diffraction grating film. The liquid crystal panel module and the backlight module can be applied to the LCD together or individually.Type: ApplicationFiled: January 6, 2011Publication date: August 4, 2011Applicants: CHIMEI INNOLUX CORPORATION, CHI MEI CORPORATION, KLASER TECHNOLOGY INC.Inventors: Wang-Yang LI, Hung-Yu LIN, Hsin-Wen CHANG, Yi-Pan LIANG, Chien-Chih WANG, Wai-Hon LEE, Huai-Fang TSAI
-
Patent number: 7576702Abstract: An automatic feedback adjustment device for a digital antenna includes a digital antenna unit, a trafficator, a tuner, a demodulator, an antenna direction driver unit, a secondary controller, and a primary controller. The digital antenna unit is a digital video/broadcasting antenna system. The trafficator is connected to the digital antenna unit to retrieve direction data associated with the actual elevation angle and direction. The tuner is connected to the digital antenna unit and the demodulator is connected to the tuner in order to receive and convert a transmission signal from a transmission terminal into the video data and a received-signal quality signal. The antenna direction driver unit is connected to the digital antenna unit in order to drive adjustment of direction and elevation angle of the antenna.Type: GrantFiled: May 11, 2007Date of Patent: August 18, 2009Assignee: Genesys Logic, Inc.Inventors: Hsin-Ching Yin, Wen-Ming Huang, Wen-Fu Tsai, Ching-Chun Huang, Chi-Wei Hsiao, Jin-Min Lin, Chien-Chih Wang
-
Publication number: 20070245385Abstract: An automatic feedback adjustment device for a digital antenna includes a digital antenna unit, a trafficator, a tuner, a demodulator, an antenna direction driver unit, a secondary controller, and a primary controller. The digital antenna unit is a digital video/broadcasting antenna system. The trafficator is connected to the digital antenna unit to retrieve direction data associated with the actual elevation angle and direction. The tuner is connected to the digital antenna unit and the demodulator is connected to the tuner in order to receive and convert a transmission signal from a transmission terminal into the video data and a received-signal quality signal. The antenna direction driver unit is connected to the digital antenna unit in order to drive adjustment of direction and elevation angle of the antenna.Type: ApplicationFiled: May 11, 2007Publication date: October 18, 2007Inventors: Hsin-Ching Yin, Wen-Ming Huang, Wen-Fu Tsai, Ching-Chun Huang, Chi-Wei Hsiao, Jin-Min Lin, Chien-Chih Wang
-
Publication number: 20070168738Abstract: A power-on error detection system and method applicable in an electronic device having a motherboard is proposed, wherein the motherboard is provided with a memory for storing a BIOS program and a signal outputting unit. The power-on error detection system and method are used to indicate an operation state of the electronic device while the electronic device reads the BIOS program at power-on and performs a POST (Power-on self-test) process. A first warning signal output command is set in the a segment of the BIOS program. The first warning signal output command drives the signal outputting unit to output a first warning signal after the electronic device is turned on and executes the POST process according to the BIOS program stored in the memory.Type: ApplicationFiled: March 30, 2006Publication date: July 19, 2007Applicant: Inventec CorporationInventor: Chien-Chih Wang
-
Patent number: 6343390Abstract: The present invention relates to a foldable playyard for an infant, which is capable of expanding for play use and folding up for downsizing and benefiting storage. The present invention introduce a safety pin located at the joint element of lower frame of the foldable playyard. The safety pin will play an important role on keeping the foldable playyard in its expanding status, and will prevent the foldable playyard from malfunction which causes an unwanted folding up. The safety pin can also carry a pulled element to a released position and unlock the restrict of the joint element. The foldable playyard comes to foldable again.Type: GrantFiled: March 31, 2000Date of Patent: February 5, 2002Assignee: Link Treasure LimitedInventors: Cheng-Fang Yang, Chien-Chih Wang