Abstract: A package substrate includes a core layer, at least one functional component, at least one spacer, a filler, a first and a second build-up structures. The core layer has at least one opening and multiple conductive through vias. The functional component is disposed in the openings. The spacer is disposed on the functional component. The filler is filled in the opening, covering the functional component and spacer, and completely filling the gap between the opening, the functional component and the spacer. The first build-up structure is disposed on a first surface of the core layer and a third surface of the filler, and electrically connected to the functional component and the conductive through vias. The second build-up structure is disposed on a second surface of the core layer and a fourth surface of the filler, contacts the spacer and electrically connected to the conductive through vias.

Abstract: A slide rail kit is applicable to a rack. The slide rail kit includes a first rail and a locking member. The first rail is arranged with a mounting feature. The locking member is arranged on the first rail. The mounting feature is configured to mount the first rail to a mounting structure of the rack. The locking member includes a locking part and an operating part. The locking part is configured to be held in a state being blocked by the rack in response to an elastic force of an elastic structure. The operating part is configured to be operated to move the locking part away from the state being blocked by the rack.

Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.

Abstract: The present disclosure provides a method of making a semiconductor device. The method includes forming a semiconductor stack on a substrate, wherein the semiconductor stack includes first semiconductor layers of a first semiconductor material and second semiconductor layers of a second semiconductor material alternatively stacked on the substrate; patterning the semiconductor stack and the substrate to form a trench and an active region being adjacent the trench; epitaxially growing a liner of the first semiconductor material on sidewalls of the trench and sidewalls of the active region; forming an isolation feature in the trench; performing a rapid thermal nitridation process, thereby converting the liner into a silicon nitride layer; and forming a cladding layer of the second semiconductor material over the silicon nitride layer.

Abstract: A package structure includes a wiring structure, a first electronic device and a reinforcement structure. The first electronic device is disposed over the top surface of the wiring structure, and has a bottom surface facing the top surface of the wiring structure. The first electronic device includes a plurality of first wires. The reinforcement structure is disposed over the top surface of the wiring structure, and includes a plurality of second wires directly contacting the plurality of first wires to reduce a variation of an elevation of the bottom surface of the first electronic device with respect to the top surface of the wiring structure.

Abstract: A speaker module includes a casing, a speaker unit and a vibration absorber. The speaker unit has a sound cavity. The speaker unit is disposed on the casing, and the speaker unit includes a first diaphragm. The vibration absorber is disposed in the casing, and the vibration absorber has a second diaphragm. When the first diaphragm vibrates, the airflow generated by the first diaphragm drives the second diaphragm to vibrate, and the vibration direction of the second diaphragm is opposite to the vibration direction of the first diaphragm, so as to absorb the vibration generated by the first diaphragm to the casing.

Abstract: An improved work function layer and a method of forming the same are disclosed. In an embodiment, the method includes forming a semiconductor fin extending from a substrate; depositing a dielectric layer over the semiconductor fin; depositing a first work function layer over the dielectric layer; and exposing the first work function layer to a metastable plasma of a first reaction gas, a metastable plasma of a generation gas, and a metastable plasma of a second reaction gas, the first reaction gas being different from the second reaction gas.

Abstract: An electronic system is provided. The electronic system includes a processor and a first power management circuit. The processor generates and outputs a first data frame. The first data frame includes at least one first guard bit and a first address. The first power management circuit includes a first register. The first power management circuit receives the first data frame and determines legitimacy of the first address according to the least one first guard bit. In response to that the first address is legal, the power management circuit transmits a first response to the processor and accesses a first region in the first register according to the first address.

Abstract: A semiconductor package includes a semiconductor die having a first surface and a second surface opposite to the first surface, a conductive wiring layer stacked with the semiconductor die and proximal to the first surface, an encapsulant encapsulating the semiconductor die and stacked with the conductive wiring layer, and a replacement structure exposing from the encapsulant and being free of fillers. A method for manufacturing the semiconductor package is also disclosed in the present disclosure.

Abstract: A semiconductor package includes a semiconductor die having a first surface and a second surface opposite to the first surface, a conductive wiring layer stacked with the semiconductor die and proximal to the first surface, an encapsulant encapsulating the semiconductor die and stacked with the conductive wiring layer, and a replacement structure exposing from the encapsulant and being free of fillers. A method for manufacturing the semiconductor package is also disclosed in the present disclosure.

Abstract: An electronic device includes an insulating layer, a metal layer and at least one electrical connecting element. The insulating layer has a top surface and a bottom surface opposite to the top surface, and defines an opening extending between the top surface and the bottom surface. The metal layer is disposed in the opening of the insulating layer and has a top surface and a bottom surface opposite to the top surface. The bottom surface of the metal layer is substantially coplanar with the bottom surface of the insulating layer. The electrical connecting element is attached to the bottom surface of the metal layer through a seed layer.

Abstract: An electronic device includes an insulating layer, a metal layer and at least one electrical connecting element. The insulating layer has a top surface and a bottom surface opposite to the top surface, and defines an opening extending between the top surface and the bottom surface. The metal layer is disposed in the opening of the insulating layer and has a top surface and a bottom surface opposite to the top surface. The bottom surface of the metal layer is substantially coplanar with the bottom surface of the insulating layer. The electrical connecting element is attached to the bottom surface of the metal layer through a seed layer.

Abstract: The invention relates to an aqueous cleaning composition for use in a cleaning process during or after a chemical mechanical planarization for a copper integrated circuit processing, comprising 0.05 to 20 wt % of a nitrogen-containing heterocyclic organic base, 0.05 to 50 wt % of an alcohol amine, 0.01-10 wt % of a quaternary ammonium hydroxide, and water. When used during or after the planarization process, the inventive cleaning composition of the invention can effectively remove residual contaminants from the surfaces of the wafers and simultaneously maintain a good surface roughness of the wafers.

Abstract: The invention relates to an aqueous cleaning composition for wafers with copper wires that have been treated by chemical mechanical planarization in an integrated circuit processing, comprising 0.1 to 15 wt % of a nitrogen-containing heterocyclic organic base, 0.1 to 35 wt % of an alcohol amine and water. Upon contact with copper-containing semiconductor wafers that have been treated by chemical mechanical planarization for an effective period of time, the aqueous cleaning composition can effectively remove residual contaminants from the surfaces of the wafers, and simultaneously provide the copper-containing semiconductor wafers with a better surface roughness.

Abstract: An aqueous cleaning composition for cleaning wafer contaminants after a chemical mechanical planarization process, includes: 0.1-20 wt % of an alkanolamine selected from the group consisting of 2-amino-1,3-propanediol, 2-amino-2-(hydroxymethyl)-1,3-propanediol, and combinations thereof; 0.05-20 wt % of a quaternary amine; and water. The cleaning composition is capable of removing efficiently residual contaminants from a polished surface of a wafer and imparting the wafer with a better surface roughness.

Abstract: The invention relates to an aqueous cleaning composition for use in a cleaning process during or after a chemical mechanical planarization for a copper integrated circuit processing, comprising 0.05 to 20 wt % of a nitrogen-containing heterocyclic organic base, 0.05 to 50 wt % of an alcohol amine, 0.01-10 wt % of a quaternary ammonium hydroxide, and water. When used during or after the planarization process, the inventive cleaning composition of the invention can effectively remove residual contaminants from the surfaces of the wafers and simultaneously maintain a good surface roughness of the wafers.

Abstract: An auto cycled pipeline system includes a plurality of main pipes, a plurality of cycle pipes, and a plurality of control values. The plurality of main pipes arranged in parallel and used to pump the fluid, and one side of each main pipe is connected to an inlet pipe, the other side of each main pipe is connected to an exit pipe. Each main pipe has a check value and a cycle pipe. One side of each cycle pipe is attached to a foregoing joint in front of the check value and the other side is attached to a rearward joint behind the check value of each main pipe. And each cycle pipe has a control value. The stagnant fluid in the stopped main pipe can be cycled by the cycle pipe of the pipeline system automatically, to prevent deterioration and to keep the purity of the fluid in the pipeline system.