Abstract: A wire bonding device of a stator of a motor includes insulating rings, an insulating cover, and conductors. Each insulating ring has first and second fixing structures disposed thereon. The insulating rings are stacked layer by layer with the first fixing structures corresponding to the second fixing structures. The insulating cover covers an uppermost one of the insulating rings. Each conductor includes an embedded segment, two bending segments, two protruding segments, and two wire-bonding segments. The embedded segment is accommodated in a corresponding insulating ring and has a flat strip shape. The bending segments are integrally extended from two ends of the embedded segment respectively and bended relative to the embedded segment. The protruding segments are integrally extended from the bending segments and protrude out of the corresponding insulating ring. The wire-bonding segments are integrally extended from the protruding segments and located outside the insulating ring.

Abstract: A serial peripheral interface (SPI) circuit and a display using the same are provided. The SPI circuit includes a mater device and a slave device. A serial data input pin and a serial data output pin of the slave device are both electrically connected to a data input/output pin of the master device. When a read instruction is sent from the master device to the slave device, the master device is set in a read status, and the slave device outputs data to the master device via the serial data output pin in response to the read instruction. When a write instruction is sent from the master device to the slave device, the master device is set in a write status, and writes data to the slave device via the serial data input pin thereof in response to the write instruction.

Abstract: A display method transmits data signals and control signals via an LVDS interface. The display method includes transmitting data codes corresponding to a control signal using a reserved bit of a channel of the LVDS interface, and generating the control signal for a display panel by decoding the data codes using a decoder of a timing controller.

Abstract: A key system utilizes two operation nodes to detect the status of a plurality of keys, and each operation node can output and read a high, a low, and a clock signal. When an operation node outputs a high signal and reads a return signal and then outputs a low signal and reads a return signal, the other operation node outputs a clock signal. Therefore, the two operation nodes can detect the status of six keys.

Abstract: A serial peripheral interface (SPI) circuit and a display using the same are provided. The SPI circuit includes a mater device and a slave device. A serial data input pin and a serial data output pin of the slave device are both electrically connected to a data input/output pin of the master device. When a read instruction is sent from the master device to the slave device, the master device is set in a read status, and the slave device outputs data to the master device via the serial data output pin in response to the read instruction. When a write instruction is sent from the master device to the slave device, the master device is set in a write status, and writes data to the slave device via the serial data input pin thereof in response to the write instruction.

Abstract: A key system utilizes two operation nodes to detect the status of a plurality of keys, and each operation node can output and read a high, a low, and a clock signal. When an operation node outputs a high signal and reads a return signal and then outputs a low signal and reads a return signal, the other operation node outputs a clock signal. Therefore, the two operation nodes can detect the status of six keys.

Abstract: An integrated display panel is provided. The integrated display panel includes a video connector, a signal selector, an image scaler and a timing controller. The video connector transmits a differential signal or a video signal. The signal selector determines whether or not to receive and output the differential signal according to a micro-control information. The image scaler is coupled to the video connector or the signal selector to scale the image. The timing controller is coupled to the video connector and the image scaler to convert the signal received by the timing controller to a display data.

Abstract: Frames are utilized to display an image of low resolution on a display device of high resolution. All scanlines utilized for generating the image are turned on to display the image data of the display area in a first frame, and part but not all of the scanlines not utilized for generating the image are turned on to display the blank data of the non-display area in the first frame. Thus, the blank data of the non-display area are displayed in multiple frames.

Abstract: A display method transmits data signals and control signals via an LVDS interface. The display method includes transmitting data codes corresponding to a control signal using a reserved bit of a channel of the LVDS interface, and generating the control signal for a display panel by decoding the data codes using a decoder of a timing controller.

Abstract: A display device includes a timing controller, a plurality of source drivers, and an interface. Data signals and control signals generated by the timing controller are embedded and transmitted to the source drivers via a data bus of the interface. Decoders of the source drivers can then generate corresponding data signals and control signals by decoding the embedded signals.

Abstract: A method for displaying a non-specified resolution frame on a panel is provided. The method is suitable for displaying a frame data whose resolution is not the same as the specified resolution of the panel module on the panel module. The method mainly inserts a dummy pulse into a clock signal in the blanking period, such that the panel module can read the blank data, and the number of the pulses of the clock signal is complied with the resolution of the panel module.