Abstract: A circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.

Abstract: A diode structure and a manufacturing method are disclosed. The diode structure includes a first metallic layer, a first-type conductive semiconductor layer, a second-type conductive semiconductor layer, a trench portion, and a second metallic layer. The first-type conductive semiconductor layer is formed on the first metallic layer. The second-type conductive semiconductor layer is formed on the first-type conductive semiconductor layer. The first-type conductive semiconductor layer and the second-type conductive semiconductor layer have opposite conductivity and a PN junction is formed therebetween. The trench portion is formed in the second-type conductive semiconductor layer and the first-type conductive semiconductor layer. A first contact surface is formed between the trench portion and the first-type conductive semiconductor layer, and a second contact surface is formed between the trench portion and the second-type conductive semiconductor layer.

Abstract: A power semiconductor includes a semiconductor substrate, a metal oxide semiconductor layer, a N-type buffer layer and a P-type injection layer. The semiconductor substrate has a first surface and a second surface. The metal oxide semiconductor layer is formed on the first surface for defining a N-type drift layer of the semiconductor substrate. The N-type buffer layer is formed on the second surface through ion implanting, and the P-type injection layer is formed on the N-type buffer layer through ion implanting. By utilizing the semiconductor substrate having drift layer and forming the N-type buffer layer and the P-type injection layer on the second surface of the semiconductor substrate through ion implanting, the ion concentration is adjustable. As a result, the electron hole injection efficiency and the width of depletion region are easily adjusted, the fabricating processes are simplified, and the fabricating time and cost are reduced.

Abstract: A power semiconductor includes a semiconductor substrate, a metal oxide semiconductor layer, a N-type buffer layer and a P-type injection layer. The semiconductor substrate has a first surface and a second surface. The metal oxide semiconductor layer is formed on the first surface for defining a N-type drift layer of the semiconductor substrate. The N-type buffer layer is formed on the second surface through ion implanting, and the P-type injection layer is formed on the N-type buffer layer through ion implanting. By utilizing the semiconductor substrate having drift layer and forming the N-type buffer layer and the P-type injection layer on the second surface of the semiconductor substrate through ion implanting, the ion concentration is adjustable. As a result, the electron hole injection efficiency and the width of depletion region are easily adjusted, the fabricating processes are simplified, and the fabricating time and cost are reduced.

Abstract: A method of fabricating a power semiconductor device includes the following steps. Firstly, a substrate is provided. A first epitaxial layer is formed over the substrate. A first trench is formed in the first epitaxial layer. A second epitaxial layer is refilled into the first trench. The first epitaxial layer and the second epitaxial layer are collaboratively defined as a first semiconductor layer. A third epitaxial layer is formed over the substrate, and a second trench is formed in the third epitaxial layer. A first doping region is formed in a sidewall of the second trench. An insulation layer is refilled into the second trench. The insulation layer, the first doping region and the third epitaxial layer are collaboratively defined as a second semiconductor layer. The power semiconductor device fabricated by the fabricating method can withstand high voltage and has low on-resistance.

Abstract: A circuit board indicator comprises a plurality of lamps with cut and bent terminals, an outer plastic holder and an inner plastic holder. The outer plastic holder contains an accommodating chamber, which has a plurality of rounded holes on a lateral side thereof. The inner plastic holder has a plurality of positioning recesses and each of the positioning recesses has a guiding slot on topside thereof. The terminals of the lamps are guided by the guiding slot and inserted into corresponding positioning recesses. The inner plastic holder further has a plurality of clamping dents to clamp corresponding lamps. The inner plastic holder has barbs on two lateral sides thereof and corresponding to rectangular grooves on the outer plastic holder. The barbs are engaged into corresponding rectangular grooves when the inner plastic holder is assembled to the outer plastic holder.

Abstract: A circuit board indicator comprises a plurality of lamps with cut and bent terminals, an outer plastic holder and an inner plastic holder. The outer plastic holder contains an accommodating chamber, which has a plurality of rounded holes on a lateral side thereof. The inner plastic holder has a plurality of positioning recesses and each of the positioning recesses has a guiding slot on topside thereof. The terminals of the lamps are guided by the guiding slot and inserted into corresponding positioning recesses. The inner plastic holder further has a plurality of clamping dents to clamp corresponding lamps. The inner plastic holder has barbs on two lateral sides thereof and corresponding to rectangular grooves on the outer plastic holder. The barbs are engaged into corresponding rectangular grooves when the inner plastic holder is assembled to the outer plastic holder.