Patents by Inventor Chien Hsiung

Chien Hsiung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145898
    Abstract: An electronic device including a metal casing and at least one antenna module is provided. The metal casing includes at least one window. The at least one antenna module is disposed in the at least one window. The at least one antenna module includes a first radiator and a second radiator. The first radiator includes a feeding end, a first ground end joined to the metal casing, a second ground end, a first portion extending from the feeding end to the first ground end, and a second portion extending from the feeding end to the second ground end. A first coupling gap is between the second radiator and the first portion. A second coupling gap is between at least part of the second radiator and the metal casing, and the second radiator includes a third ground end joined to the metal casing.
    Type: Application
    Filed: September 8, 2023
    Publication date: May 2, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Sheng-Chin Hsu, Chih-Wei Liao, Hau Yuen Tan, Cheng-Hsiung Wu, Shih-Keng Huang
  • Publication number: 20240145389
    Abstract: A semiconductor chip includes a first intellectual property block. There are a second intellectual property block and a third intellectual property block around the first intellectual property block. There is a multiple metal layer stack over the first intellectual property block, the second intellectual property block, and the third intellectual property block. An interconnect structure is situated in the upper portion of the multiple metal layer stack. The interconnect structure is configured for connecting the first intellectual property block and the second intellectual property block. In addition, at least a part of the interconnect structure extends across and over the third intellectual property block.
    Type: Application
    Filed: July 28, 2023
    Publication date: May 2, 2024
    Inventors: Li-Chiu WENG, Yew Teck TIEO, Ming-Hsuan WANG, Chia-Cheng CHEN, Wei-Yi CHANG, Jen-Hang YANG, Chien-Hsiung HSU
  • Patent number: 11970342
    Abstract: The present invention relates to a chip tray positioning device, which mainly comprises a frame body, a tray conveying module, a pulling module, a pushing module and a controller. The tray conveying module is disposed on the frame body, electrically connected to the controller and controlled to convey a chip tray from the start area to the end area. The pulling module and the pushing module are disposed on the frame body, electrically connected to the controller and controlled to cause the chip tray to be abutted against the end wall and the lateral wall of the frame body, thereby realizing the positioning of the chip tray and eliminating an error formed in the transfer process of the chip tray. In addition, the controller also controls the pushing module to knock the chip tray at a specific frequency so that the chip tray is vibrated.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: April 30, 2024
    Assignee: CHROMA ATE INC.
    Inventors: Chien-Ming Chen, Jui-Hsiung Chen, Chi-Wei Wang
  • Publication number: 20240120241
    Abstract: The present invention provides an electrostatic charge detecting packaging device comprising a carrier, multiple dies, and multiple electrostatic-charge-sensitive components; the carrier has a surface; the dies are mounted on the surface of the carrier; and the electrostatic-charge-sensitive components are mounted on the surface of the carrier; since an electrostatic voltage tolerance of each of the electrostatic-charge-sensitive components is lower than an electrostatic voltage tolerance of each of the dies, accumulated electrostatic charges are more likely to discharge towards the electrostatic-charge-sensitive components than towards the dies, and as such, by electrically testing whether the electrostatic-charge-sensitive components are functioning normally when packaging the dies, the present invention allows personnel to debug for knowing which packaging steps exactly cause more serious problems that lead to damaging electrostatic discharges in the dies.
    Type: Application
    Filed: November 30, 2022
    Publication date: April 11, 2024
    Inventors: Chung-Hsiung HO, Chien-Chun Wang, Li-Qiang Ye, Chi-Hsueh Li
  • Publication number: 20240120317
    Abstract: A fan-out semiconductor device includes stacked semiconductor dies having die bond pads arranged in columns exposed at a sidewall of the stacked semiconductor dies. The stacked dies are encapsulated in a photo imageable dielectric (PID) material, which is developed to form through-hole cavities that expose the columns of bond pads of each die at the sidewall. The through-hole cavities are plated or filled with an electrical conductor to form conductive through-holes coupling die bond pads within the columns to each other.
    Type: Application
    Filed: July 13, 2023
    Publication date: April 11, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Cheng-Hsiung Yang, Chien Te Chen, Cong Zhang, Ching-Chuan Hsieh, Yu-Ying Tan, Juan Zhou, Ai-wen Wang, Yih-Fran Lee, Yu-Wen Huang
  • Patent number: 11955707
    Abstract: An antenna module includes first to third radiators and a ground radiator. The first radiator includes first and second sections and excites at a first frequency band. An extension direction of the first section, including a feeding end, is not parallel to an extension direction of the second section. The second radiator includes third and fourth sections. The third section extends from an intersection of the first and second sections. The third section excites at a second frequency band. The third radiator is disposed beside the first radiator and away from the second radiator. The ground radiator is disposed on one side of the first, second, and third radiators, and includes a ground end. The fourth section of the second radiator is connected to the third section and the ground radiator. The third radiator is connected to the ground end.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: April 9, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Chao-Hsu Wu, Hau Yuen Tan, Chien-Yi Wu, Shih-Keng Huang, Cheng-Hsiung Wu, Ching-Hsiang Ko
  • Patent number: 11949157
    Abstract: A dual polarization log-periodic antenna apparatus includes a log-periodic antenna and a conical reflector. The conical reflector is arranged below the log-periodic antenna. The log-periodic antenna is configured to transmit a plurality of radio waves. The conical reflector is configured to reflect the radio waves transmitted by the log-periodic antenna.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: April 2, 2024
    Assignees: GRAND-TEK TECHNOLOGY CO., LTD., RESILIENT TECHNOLOGY CO., LTD.
    Inventors: Kai-Hsiung Hsu, Jia-Jiu Song, Chien-Wen Hung
  • Patent number: 11935620
    Abstract: A memory device for memory cell programming and erasing with refreshing operation is disclosed. The memory device includes multiple location-related memory cells and a refresh module. The location-related memory cells are coupled to a bit line on which a selecting voltage is applied. The refresh module rewrites a stored data of a first cell of the location-related memory cells to the first cell of the location-related memory cells in response to an operation count being smaller than a number N. N is related to the number of the location-related memory cells.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yue-Der Chih, Cheng-Hsiung Kuo, Gu-Huan Li, Chien-Yin Liu
  • Patent number: 11929398
    Abstract: Present disclosure provides a FinFET structure, including a substrate, a fin protruding from the substrate, including a first portion and a second portion below the first portion, wherein the first portion includes a first dopant concentration of a dopant, and the second portion includes a second dopant concentration of the dopant, the second dopant concentration is greater than the first dopant concentration, a gate over the fin, wherein the second portion of the fin is below a bottom surface of the gate, and an insulating layer over the substrate and proximal to the second portion of the fin, wherein at least a first portion of the insulating layer includes a third dopant concentration of the dopant, the third dopant concentration is greater than the first dopant concentration.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun Hsiung Tsai, Lai-Wan Chong, Chien-Wei Lee, Kei-Wei Chen
  • Publication number: 20240079788
    Abstract: A dual polarization log-periodic antenna apparatus includes a log-periodic antenna and a conical reflector. The conical reflector is arranged below the log-periodic antenna. The log-periodic antenna is configured to transmit a plurality of radio waves. The conical reflector is configured to reflect the radio waves transmitted by the log-periodic antenna.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Kai-Hsiung HSU, Jia-Jiu SONG, Chien-Wen HUNG
  • Publication number: 20240019670
    Abstract: An imaging lens includes a first lens, a second lens and a third lens arranged in order from an object side to an image side. The imaging lens satisfies the conditions of 0.07 mm<dBFL<0.17 mm and 1<DL/LT<1.79, where dBFL denotes a distance between a focal plane formed by light with a wavelength of 587 nm and a focal plane formed by light with a wavelength of 940 nm on an optical axis of the imaging lens when a subject to be captured is at infinity, DL is a lens diameter of the third lens, LT is a distance measured on the optical axis of the imaging lens between an object-side surface of the first lens and an image-side surface of the third lens.
    Type: Application
    Filed: July 10, 2023
    Publication date: January 18, 2024
    Inventors: CHING-SHENG CHANG, CHIEN-HSIUNG TSENG
  • Patent number: 11678714
    Abstract: An insole/sole structure contains: a top pad, two massage column modules, a form pad, and a bottom pad. The top pad includes at least one accommodation groove. A respective one of the at least one massage column module includes a holding portion and multiple flexible massaging columns. The respective one massage column module is connected on the top pad by using the holding portion. The multiple flexible massaging columns are held on the holding portion to correspond to a profile of a respective one accommodation groove. A profile of the foam pad and a profile of the bottom pad correspond to a profile of the top pad, such that when the foam pad and the bottom pad are connected, the foam pad and the bottom pad are closed, and the respective one massage column module is limited between the top pad and the foam pad.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: June 20, 2023
    Inventor: Chien-Hsiung Huang
  • Publication number: 20230145949
    Abstract: A sound detecting device for pelvic floor muscle exercise includes: a main body, having a base seat; a sound collecting chamber, having an opening; an elastic sound receiving membrane, disposed in the main body and located at the opening; a support ring, disposed at a top end of the main body, arranged at a periphery of the elastic sound receiving membrane and corresponding to an outer periphery of the opening; a microphone, disposed at a bottom end of the sound collecting chamber; and an electric circuit board, disposed on the base seat, used for providing a wave filtering function and an amplifying function, connected to the microphone, and connected to at least one smart device installed with an application program (APP) through a Bluetooth device. As such, low frequencies generated when the pelvic floor muscle is relaxed or contacted can be amplified and precisely collected.
    Type: Application
    Filed: October 20, 2022
    Publication date: May 11, 2023
    Inventor: Chien-Hsiung HUNG
  • Publication number: 20230138830
    Abstract: An optical lens includes an aperture, a first lens, a second lens, a third lens, and a fourth lens sequentially in a direction. One of the first lens and the second lens has positive refracting power, and the other has negative refracting power. The third lens has refracting power, and is a lens with a largest diameter in the optical lens. The fourth lens has the refracting power. The four lenses are made of glass. For light having a wavelength of 1315 nm, a transmittance of the optical lens is greater than ninety percent.
    Type: Application
    Filed: August 22, 2022
    Publication date: May 4, 2023
    Applicant: Young Optics Inc.
    Inventors: Wei-Ting Chiu, Chien-Hsiung Tseng
  • Patent number: 11551923
    Abstract: A Taiko wafer ring cut process method is provided. The Taiko wafer ring cut process method includes the following steps. A Taiko wafer is disposed on the platform. The Taiko wafer is performing by laser ring cutting so that a Taiko ring and an edge portion of the Taiko wafer are separated from a wafer portion of the Taiko wafer. The wafer portion of the Taiko wafer is adhered to a frame.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: January 10, 2023
    Assignee: PHOENIX SILICON INTERNATIONAL CORP.
    Inventors: Chien-Hsiung Huang, Chao-Tsung Tsou, Cheng-Yen Lin
  • Patent number: 11418123
    Abstract: A power supply apparatus (10) suppressing a transient voltage is applied to an input voltage (50). The power supply apparatus (10) includes a power supply circuit (20), a feedback signal generation circuit (30) and a feedback signal control circuit (40). If the power supply circuit (20) stops receiving the input voltage (50), the feedback signal control circuit (40) controls the feedback signal generation circuit (30) to discharge so that the feedback signal generation circuit (30) controls the power supply circuit (20) to decrease an output voltage (60), so that when the power supply circuit (20) receives the input voltage (50) again, the power supply circuit (20) avoids generating an output overvoltage condition for the output voltage (60).
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: August 16, 2022
    Assignee: P-DUKE TECHNOLOGY CO, LTD.
    Inventors: Lien-Hsing Chen, Ta-Wen Chang, Liang-Jhou Dai, Chien-Hsiung Huang
  • Publication number: 20220230869
    Abstract: A Taiko wafer ring cut process method is provided. The Taiko wafer ring cut process method includes the following steps. A Taiko wafer is disposed on the platform. The Taiko wafer is performing by laser ring cutting so that a Taiko ring and an edge portion of the Taiko wafer are separated from a wafer portion of the Taiko wafer. The wafer portion of the Taiko wafer is adhered to a frame.
    Type: Application
    Filed: January 15, 2021
    Publication date: July 21, 2022
    Inventors: CHIEN-HSIUNG HUANG, CHAO-TSUNG TSOU, CHENG-YEN LIN
  • Publication number: 20220228250
    Abstract: A crucible includes a crucible body and at least one protrusion. The crucible body has a containing groove. The protrusion is disposed on an outer wall surface of the crucible body. The protrusion protrudes outward from the outer wall of the crucible body. A vapor deposition apparatus includes a metal base and a crucible. The crucible is disposed in the metal base. The crucible includes a crucible body and at least one protrusion. The crucible body has a containing groove, and the containing groove is used for adding a vapor deposition material. The protrusion is disposed on an outer wall surface of the crucible body. The protrusion protrudes outward from the outer wall of the crucible body, and the protrusion abuts the inner wall of the metal base.
    Type: Application
    Filed: January 15, 2021
    Publication date: July 21, 2022
    Inventors: CHIEN-HSIUNG HUANG, CHAO-TSUNG TSOU, CHENG-YEN LIN
  • Patent number: 11391925
    Abstract: An optical lens includes a first lens group, an aperture, and a second lens group which are sequentially arranged along an optical axis from a magnified side to a minified side. The first lens group has a negative refractive power and includes three lenses with refractive powers. The first lens group includes a lens with positive refractive power. The first lens group includes an aspheric lens. The second lens group has a positive refractive power and includes three lenses with refractive power. The second lens group includes a lens with a negative refractive power. The second lens group includes a lens closest to the minified side which is a cemented lens. The second lens group includes an aspheric lens. In the optical lens, a number of the lenses having the refractive powers is within a range from 6 to 8.
    Type: Grant
    Filed: April 26, 2020
    Date of Patent: July 19, 2022
    Assignee: Young Optics Inc.
    Inventors: Wei-Ting Chiu, Chien-Hsiung Tseng
  • Publication number: 20220181983
    Abstract: A power supply apparatus (10) suppressing a transient voltage is applied to an input voltage (50). The power supply apparatus (10) includes a power supply circuit (20), a feedback signal generation circuit (30) and a feedback signal control circuit (40). If the power supply circuit (20) stops receiving the input voltage (50), the feedback signal control circuit (40) controls the feedback signal generation circuit (30) to discharge so that the feedback signal generation circuit (30) controls the power supply circuit (20) to decrease an output voltage (60), so that when the power supply circuit (20) receives the input voltage (50) again, the power supply circuit (20) avoids generating an output overvoltage condition for the output voltage (60).
    Type: Application
    Filed: December 8, 2020
    Publication date: June 9, 2022
    Inventors: Lien-Hsing CHEN, Ta-Wen CHANG, Liang-Jhou DAI, Chien-Hsiung HUANG