Patents by Inventor Chien-Huei Chen

Chien-Huei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12136466
    Abstract: Header circuitry for a memory device includes multiple backside power rails that form distinct voltage sources for a plurality of switching devices in the header circuitry. The header circuitry includes at least one region of a first conductivity type. A first section in the first region includes one backside power rail (BPR) that forms a first voltage source that provides a first voltage. A second section in the same first region includes another BPR that forms a second voltage source that provides a second voltage that is different from the first voltage.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: November 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Haruki Mori, Chien-Chi Tien, Chia-En Huang, Hidehiro Fujiwara, Yen-Huei Chen, Feng-Lun Chen
  • Publication number: 20240363451
    Abstract: A method of qualifying semiconductor wafer processing includes: illuminating a semiconductor wafer simultaneously with source light having wavelengths in a plurality of wavebands, including at least a first waveband and a second waveband, the second waveband being different from the first waveband; separating light reflected from the semiconductor wafer as a result of said illuminating, the separating dividing the reflected light according to waveband; generating a first image of the semiconductor wafer based on reflected light separated into the first waveband; and, generating a second image of the semiconductor wafer base on reflected light separated into the second waveband.
    Type: Application
    Filed: July 9, 2024
    Publication date: October 31, 2024
    Inventors: Shih-Chang Wang, Hsiu-Hui Huang, Hung-Yi Chung, Chien-Huei Chen, Xiaomeng Chen
  • Patent number: 12068207
    Abstract: A method of qualifying semiconductor wafer processing includes: illuminating a semiconductor wafer simultaneously with source light having wavelengths in a plurality of wavebands, including at least a first waveband and a second waveband, the second waveband being different from the first waveband; separating light reflected from the semiconductor wafer as a result of said illuminating, the separating dividing the reflected light according to waveband; generating a first image of the semiconductor wafer based on reflected light separated into the first waveband; and, generating a second image of the semiconductor wafer base on reflected light separated into the second waveband.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: August 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Chang Wang, Hsiu-Hui Huang, Hung-Yi Chung, Chien-Huei Chen, Xiaomeng Chen
  • Publication number: 20240144467
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Patent number: 11900586
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: February 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Publication number: 20230411224
    Abstract: A system configured to detect defects on a wafer is provided. The system includes an inspection subsystem configured to acquire scan data of a target region on the wafer. The target region comprises a plurality of circuit layout streaming data on the wafer and the defects in proximity to the circuit layout streaming data or in the circuit layout streaming data. A graphic design subsystem (GDS) is configured to store a map of circuit layout streaming data of the wafer. A software tool for designing electronic systems is configured to label the scan data with attributes from the map of circuit layout streaming data. A decision subsystem is configured to qualify the process based on a predetermined defect level from the labeled scan data by using a multi-dimension clustering method, wherein the predetermined defect level is an accumulated defect formed on the semiconductor wafer during processing.
    Type: Application
    Filed: June 16, 2022
    Publication date: December 21, 2023
    Inventors: SHIH-CHANG WANG, HSIU-HUI HUANG, FENG-JU CHANG, YEN-FONG CHAN, CHIEN-HUEI CHEN, XIAOMENG CHEN
  • Publication number: 20230411223
    Abstract: A method of qualifying semiconductor wafer processing includes: illuminating a semiconductor wafer simultaneously with source light having wavelengths in a plurality of wavebands, including at least a first waveband and a second waveband, the second waveband being different from the first waveband; separating light reflected from the semiconductor wafer as a result of said illuminating, the separating dividing the reflected light according to waveband; generating a first image of the semiconductor wafer based on reflected light separated into the first waveband; and, generating a second image of the semiconductor wafer base on reflected light separated into the second waveband.
    Type: Application
    Filed: May 27, 2022
    Publication date: December 21, 2023
    Inventors: Shih-Chang Wang, Hsiu-Hui Huang, Hung-Yi Chung, Chien-Huei Chen, Xiaomeng Chen
  • Patent number: 11231376
    Abstract: A method for semiconductor wafer inspection is provided. The method includes the following operations. The semiconductor wafer is scanned to acquire a scanned map, wherein the semiconductor wafer is patterned according to a design map having a programmed defect. The design map and the scanned map are transformed to a transformed inspection map according to the location of the programmed defect on the design map and the location of the programmed defect on the scanned map. The system of semiconductor wafer inspection is also provided.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: January 25, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chien-Huei Chen, Hung-Yi Chung, Xiaomeng Chen
  • Publication number: 20210118125
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: December 15, 2020
    Publication date: April 22, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Patent number: 10964014
    Abstract: A defect detecting method, a defect detecting system, and a non-transitory computer-readable medium are provided. The defect detecting method includes applying a rank filter to multiple scan images of consecutive dies of a reference wafer scanned by a wafer inspection tool to obtain multiple reference die images; collecting multiple target die images of a target die of a target wafer scanned by the wafer inspection tool; comparing the target die images with the reference die images to detect multiple defects according to differences of pixel values of corresponding pixels in the target die images and the reference die images; and excluding multiple common defects from the detected defects to detect at least one mask defect printed on the target wafer, where the common defects are obtained by the wafer inspection tool performing a wafer inspection on the target wafer.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: March 30, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Chien-Huei Chen
  • Publication number: 20210063319
    Abstract: A method for semiconductor wafer inspection is provided. The method includes the following operations. The semiconductor wafer is scanned to acquire a scanned map, wherein the semiconductor wafer is patterned according to a design map having a programmed defect. The design map and the scanned map are transformed to a transformed inspection map according to the location of the programmed defect on the design map and the location of the programmed defect on the scanned map. The system of semiconductor wafer inspection is also provided.
    Type: Application
    Filed: April 15, 2020
    Publication date: March 4, 2021
    Inventors: CHIEN-HUEI CHEN, HUNG-YI CHUNG, XIAOMENG CHEN
  • Patent number: 10872406
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: December 22, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Patent number: 10809635
    Abstract: A defect inspection method and a defect inspection system are provided. In the method, a plurality of candidate defect images are retrieved from inspection images obtained by at least one optical inspection tool performing hot scans on at least one wafer and a plurality of attributes are extracted from the inspection images. A random forest classifier including a plurality of decision trees for classifying the candidate defect images is created, wherein the decision trees are built with different subset of the attributes and the candidate defect images. A plurality of candidate defect images are retrieved from the optical inspection tool in runtime and applied to the decision trees, and classified into nuisance images and real defect images according to votes of the decision trees in which the nuisance images are filtered out. The real defect images with the votes over a confidence value are sampled for microscopic review.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: October 20, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Hung-Yi Chung, Chao-Ting Hong, Cheng-Kuang Lee, Xiaomeng Chen, Teng-Cheng Hsu
  • Publication number: 20190318471
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: August 29, 2018
    Publication date: October 17, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Publication number: 20190155164
    Abstract: A defect inspection method and a defect inspection system are provided. In the method, a plurality of candidate defect images are retrieved from inspection images obtained by at least one optical inspection tool performing hot scans on at least one wafer and a plurality of attributes are extracted from the inspection images. A random forest classifier including a plurality of decision trees for classifying the candidate defect images is created, wherein the decision trees are built with different subset of the attributes and the candidate defect images. A plurality of candidate defect images are retrieved from the optical inspection tool in runtime and applied to the decision trees, and classified into nuisance images and real defect images according to votes of the decision trees in which the nuisance images are filtered out. The real defect images with the votes over a confidence value are sampled for microscopic review.
    Type: Application
    Filed: March 29, 2018
    Publication date: May 23, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Huei Chen, Hung-Yi Chung, Chao-Ting Hong, Cheng-Kuang Lee, Xiaomeng Chen, Teng-Cheng Hsu
  • Publication number: 20190130551
    Abstract: A defect detecting method, a defect detecting system, and a non-transitory computer-readable medium are provided. The defect detecting method includes applying a rank filter to multiple scan images of consecutive dies of a reference wafer scanned by a wafer inspection tool to obtain multiple reference die images; collecting multiple target die images of a target die of a target wafer scanned by the wafer inspection tool; comparing the target die images with the reference die images to detect multiple defects according to differences of pixel values of corresponding pixels in the target die images and the reference die images; and excluding multiple common defects from the detected defects to detect at least one mask defect printed on the target wafer, where the common defects are obtained by the wafer inspection tool performing a wafer inspection on the target wafer.
    Type: Application
    Filed: January 30, 2018
    Publication date: May 2, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chien-Huei Chen
  • Patent number: 9483819
    Abstract: One embodiment relates to a method of inspecting an array of cells on a substrate. A reference image is generated using a cell image that was previously determined to be defect free. A reference contour image which includes contours of the reference image is also generated. The reference contour image is used to detect defects in the array of cells on the substrate. Another embodiment relates to a system for detecting defects in an array on a substrate. Other embodiments, aspects and features are also disclosed.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: November 1, 2016
    Assignee: KLA-Tencor Corporation
    Inventors: Chien-Huei Chen, Ajay Gupta, Thanh Huy Ha, Jianwei Wang, Hedong Yang, Christopher Michael Maher, Michael J. Van Riet
  • Publication number: 20140212024
    Abstract: One embodiment relates to a method of inspecting an array of cells on a substrate. A reference image is generated using a cell image that was previously determined to be defect free. A reference contour image which includes contours of the reference image is also generated. The reference contour image is used to detect defects in the array of cells on the substrate. Another embodiment relates to a system for detecting defects in an array on a substrate. Other embodiments, aspects and features are also disclosed.
    Type: Application
    Filed: October 24, 2013
    Publication date: July 31, 2014
    Applicant: KLA-TENCOR CORPORATION
    Inventors: Chien-Huei CHEN, Ajay GUPTA, Thanh Huy HA, Jianwei WANG, Hedong YANG, Christopher Michael MAHER, Michael J. VAN RIET
  • Patent number: 8669523
    Abstract: One embodiment relates to a method of inspecting a site location on a target substrate. Contours are obtained, the contours having been generated from a reference image using a design clip. A target image of the site location is acquired. The contours are aligned to the target image, and contrast values are computed for pixels on the contours. A threshold is applied to the contrast values to determine contour-based defect blobs. Another embodiment relates to a method of generating contours for use in inspecting a site location for defects. Other embodiments, aspects and features are also disclosed.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: March 11, 2014
    Assignee: KLA-Tencor Corporation
    Inventors: Chien-Huei Chen, Peter White, Michael J. Van Riet, Sankar Venkataraman, Hai Jiang, Hedong Yang, Ajay Gupta
  • Patent number: 8502146
    Abstract: One embodiment relates to a method of classifying a defect on a substrate surface. The method includes scanning a primary electron beam over a target region of the substrate surface causing secondary electrons to be emitted therefrom, wherein the target region includes the defect. The secondary electrons are detected from the target region using a plurality of at least two off-axis sensors so as to generate a plurality of image frames of the target region, each image frame of the target region including data from a different off-axis sensor. The plurality of image data frames are processed to generate a surface height map of the target region, and surface height attributes are determined for the defect. The surface height attributes for the defect are input into a defect classifier. Other embodiments, aspects and features are also disclosed.
    Type: Grant
    Filed: October 3, 2011
    Date of Patent: August 6, 2013
    Assignee: KLA-Tencor Corporation
    Inventors: Chien-Huei Chen, Hedong Yang, Cho H. Teh