Patents by Inventor Chien-Hui Chuan

Chien-Hui Chuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ESD protection circuit for mixed-voltage I/O ports using substrated triggering
    Patent number: 6903913
    Abstract: An ESD protection circuit for mixed-voltage input/output (I/O) circuits. The ESD protection circuit utilizes substrate triggering of a parasitic NPN BJT under a cascaded NMOS transistor pair with a current generated by a triggering current generator. The ESD protection circuit is triggered much faster. Under normal circuit operations, the triggering current generator can also endure high-voltage signals without overstressing internal components and retains good reliability.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: June 7, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Dou Ker, Chien-Hui Chuan
  • ESD protection circuit for mixed-voltage I/O ports using substrated triggering
    Publication number: 20030076645
    Abstract: An ESD protection circuit for mixed-voltage input/output (I/O) circuits. The ESD protection circuit utilizes substrate triggering of a parasitic NPN BJT under a cascaded NMOS transistor pair with a current generated by a triggering current generator. The ESD protection circuit is triggered much faster. Under normal circuit operations, the triggering current generator can also endure high-voltage signals without overstressing internal components and retains good reliability.
    Type: Application
    Filed: September 25, 2002
    Publication date: April 24, 2003
    Inventors: Ming-Dou Ker, Chien-Hui Chuan