Patents by Inventor Chien-Jung Huang

Chien-Jung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240387399
    Abstract: A semiconductor may include a handle substrate, a semiconductor material layer on which semiconductor devices, metal interconnect structures, dielectric material layers, and an inductor structure are located, and a patterned magnetic shielding layer including at least one portion of a ferromagnetic material having relative permeability of at least 20 and disposed between the semiconductor material layer and the handle substrate and reducing electromagnetic coupling between the inductor structure and the handle substrate.
    Type: Application
    Filed: May 16, 2023
    Publication date: November 21, 2024
    Inventors: Fu-Hai Li, Chien Hung Liu, Hsien Jung Chen, Kuo-Ching Huang, Harry-Hak-Lay Chuang
  • Patent number: 12142843
    Abstract: An electronic device, including a metal back cover, a ground radiator, a third radiator, and a metal frame including a first cutting opening, a second cutting opening, a first radiator located between the first cutting opening and the second cutting opening, and a second radiator located beside the second cutting opening and separated from the first radiator by the second cutting opening, is provided. An end of a first slot formed between the metal back cover and a first part of the first radiator is communicated with the first cutting opening, and a second slot formed between the metal back cover and a second part of the first radiator and between the metal back cover and the second radiator is communicated with the second cutting opening. The ground radiator connects the metal back cover and the first radiator and separates the first slot from the second slot.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: November 12, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Hau Yuen Tan, Chih-Wei Liao, Shih-Keng Huang, Wen-Hgin Chuang, Chia-Hong Chen, Lin-Hsu Chiang, Han-Wei Wang, Chun-Jung Hu
  • Publication number: 20240345428
    Abstract: An electronic device including an active region and a peripheral region, and includes a substrate including a first edge; a first electrode layer disposed on the substrate; a first conductive glue disposed on the substrate and in the peripheral region; a second conductive glue disposed on the substrate and in the peripheral region; an insulating glue disposed in the peripheral region and overlapped with the first conductive glue and the second conductive glue; and a first metal element fixed on the first electrode layer through the first conductive glue and the insulating glue; wherein in a top view, the insulating glue extends along an extension direction parallel to the first edge, and along the extension direction, a sum of lengths of the first conductive glue and the second conductive glue is less than a length of the insulating glue.
    Type: Application
    Filed: June 25, 2024
    Publication date: October 17, 2024
    Inventors: Wen-Cheng HUANG, Bi-Ly LIN, Chia-Chun YANG, Ying-Jung WU, Chien-Wei TSENG
  • Publication number: 20240250089
    Abstract: A layer stack including a first bonding dielectric material layer, a dielectric metal oxide layer, and a second bonding dielectric material layer is formed over a top surface of a substrate including a substrate semiconductor layer. A conductive material layer is formed by depositing a conductive material over the second bonding dielectric material layer. The substrate semiconductor layer is thinned by removing portions of the substrate semiconductor layer that are distal from the layer stack, whereby a remaining portion of the substrate semiconductor layer includes a top semiconductor layer. A semiconductor device may be formed on the top semiconductor layer.
    Type: Application
    Filed: April 5, 2024
    Publication date: July 25, 2024
    Inventors: Harry-Hak-Lay Chuang, Wei-Cheng Wu, Chien Hung Liu, Hsin Fu Lin, Hsien Jung Chen, Henry Wang, Tsung-Hao Yeh, Kuo-Ching Huang
  • Patent number: 12044914
    Abstract: An electronic device including an active region and a peripheral region, and includes a substrate including a first edge and a second edge; a first electrode layer disposed on the substrate; a first conductive glue disposed on the substrate and in the peripheral region; a second conductive glue disposed on the substrate and in the peripheral region; an insulating glue overlapped with the first conductive glue and the second conductive glue; and a first metal element fixed on the first electrode layer through the first conductive glue and the insulating glue; wherein in a top view, the insulating glue is disposed in the peripheral region and extends along an extension direction parallel to the first edge, and along the extension direction, a first distance between the first conductive glue and the second edge is greater than a second distance between the second conductive glue and the second edge.
    Type: Grant
    Filed: October 27, 2023
    Date of Patent: July 23, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Wen-Cheng Huang, Bi-Ly Lin, Chia-Chun Yang, Ying- Jung Wu, Chien-Wei Tseng
  • Publication number: 20240173795
    Abstract: A cavity forming method includes the steps of: providing the material modification processing device; according to the cavity topography of the workpiece, utilizing the material modification processing device to perform local modification including: calculating the laser-light shaping and scanning information, and based on the laser-light shaping and scanning information to have the optical axis adjustment unit to adjust positions of the laser-light shaping and scanning processing module and the processing stage, such that the area of the workpiece to be projected by the Bessel beam can be formed as the modified area; and, etching the modified area to form a cavity of the cavity topography. In additional, a material modification processing device is also provided.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 30, 2024
    Inventors: FU-LUNG CHOU, Chien-Jung Huang, Yu-Chung Lin
  • Publication number: 20230268938
    Abstract: A wireless communication device includes a processor, a baseband signal processing circuit and a wireless transceiver circuit. The processor determines a transmission need, determines a transmission rate according to the transmission need and a channel condition, and provides data and information regarding the transmission rate to the baseband signal processing circuit. The information regarding the transmission rate includes at least one of a selected transmission standard, a selected physical layer data transmission rate and a selected modulation and coding scheme. The baseband signal processing circuit is coupled to the processor and processes the data according to the information regarding the transmission rate to accordingly generate a packet. The wireless transceiver circuit is coupled to the baseband signal processing circuit and transmits the packet.
    Type: Application
    Filed: January 17, 2023
    Publication date: August 24, 2023
    Applicant: Realtek Semiconductor Corp.
    Inventors: Wei-Chi Lai, Wei-Hsuan Chang, Chien-Jung Huang
  • Patent number: 11695444
    Abstract: A transceiver circuit includes a counter device, a compensation circuit and an adjusting circuit. The counter device is configured to count an execution time of a reception operation and accordingly generate a counting result. The compensation circuit is coupled to the counter device and configured to receive the counting result, determine a plurality of compensation values according to the counting result and sequentially output the compensation values in a transmission operation. The transmission operation follows the reception operation. The adjusting circuit is coupled to the compensation circuit, and configured to receive the compensation values and sequentially adjust amplitude of a signal according to the compensation values in the transmission operation. The compensation values are respectively applied to different portions of the signal.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: July 4, 2023
    Assignee: Realtek Semiconductor Corp.
    Inventors: Beng-Meng Chen, Chien-Jung Huang, Jhih-Yuan Ke
  • Publication number: 20230155696
    Abstract: A calibration circuit and a calibration method for a wireless transceiver are provided. The wireless transceiver includes a transmission path and a reception path, and the transmission path includes a radio frequency (RF) circuit and a baseband amplifier. The calibration method includes the following steps: setting a target gain of the RF circuit according to a first gain setting value; receiving a first input signal through a coupling path and the reception path; measuring first power of the first input signal; setting the target gain of the RF circuit according to a second gain setting value; receiving a second input signal through the coupling path and the reception path; measuring second power of the second input signal; calculating a power difference between the first power and the second power; and adjusting at least one of the baseband amplifier and a digital circuit according to the power difference.
    Type: Application
    Filed: November 8, 2022
    Publication date: May 18, 2023
    Inventors: MENG-CHE LI, CHIEN-JUNG HUANG
  • Publication number: 20230133223
    Abstract: The present invention discloses a transmission circuit having output power compensation mechanism. A base-band circuit receives and processes a digital input signal to perform conversion and amplification according to at least one gain parameter to generate an analog output signal. A frequency up-converting circuit performs frequency up-conversion on the analog output signal to generate an RF signal. A RF amplification circuit amplifies the RF signal to generate an output RF signal to an antenna. A temperature monitoring circuit monitors temperature of the RF amplification circuit to generate an instant temperature value thereof. A calibration circuit increases at least a part of the gain parameter when the instant temperature value makes a power of the RF amplification circuit decrease and decreases at least a part of the gain parameter when the instant temperature value makes the power increase.
    Type: Application
    Filed: November 2, 2022
    Publication date: May 4, 2023
    Inventors: BENG-MENG CHEN, CHIEN-JUNG HUANG, JHIH-YUAN KE
  • Patent number: 11558020
    Abstract: A transmission circuit includes a power amplifier, a power amplifier forestage circuit and a signal strength adjusting circuit. The power amplifier is configured to amplify an input signal to output an output signal. The power amplifier forestage circuit is configured to output the input signal. The signal strength adjusting circuit includes a conversion circuit, a processing circuit and a storage unit. The conversion circuit is configured to convert the voltage of the output signal into an operation value. The processing circuit is configured to perform an operation according to a target index value stored by the storage unit and the operation value to obtain a differential value. The processing circuit is further configured to adjust the input signal outputted by the power amplifier forestage circuit according to the differential value, so that the power of the output signal is maintained at a target power value.
    Type: Grant
    Filed: July 1, 2021
    Date of Patent: January 17, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Beng-Meng Chen, Chien-Jung Huang, Yi-Hua Lu
  • Patent number: 11522621
    Abstract: The present invention discloses a calibration method and calibration circuit for a wireless transceiver. The wireless transceiver includes a transmission path and a reception path, and there is a mixer on the transmission path. The calibration method includes the following steps: (A) adjusting a first parameter of a first LC tank circuit of the mixer; (B) receiving a first input signal via a coupling path and the reception path; (C) measuring a first power of the first input signal; (D) repeating steps (A) to (C) to obtain multiple first powers; and (E) determining a first target parameter corresponding to a largest power of the first powers.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: December 6, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chien-Jung Huang, Yi-Hua Lu
  • Publication number: 20220376718
    Abstract: The present invention provides a calibration method of a transmitter, wherein the transmitter includes a power amplifier, a transformer, an adjusting circuit and a coupling circuit, wherein the power amplifier receives an input signal to generate an amplified input signal, the transformer receives the amplified input signal to generate an output signal, the adjusting circuit adjusts phase and amplitude of a common mode signal of the amplified input signal to generate a first signal, and the coupling circuit generates a coupled signal to the output signal according to the first signal. In addition, the calibration method includes: controlling the adjusting circuit to have multiple combination; calculating a strength of a second harmonic of the output signal under each combination; and determining a specific condition according to the intensities of the second harmonics under the combinations.
    Type: Application
    Filed: April 26, 2022
    Publication date: November 24, 2022
    Applicant: Realtek Semiconductor Corp.
    Inventors: Beng-Meng Chen, Hung-Han Chen, Chien-Jung Huang
  • Publication number: 20220337280
    Abstract: A transceiver circuit includes a counter device, a compensation circuit and an adjusting circuit. The counter device is configured to count an execution time of a reception operation and accordingly generate a counting result. The compensation circuit is coupled to the counter device and configured to receive the counting result, determine a plurality of compensation values according to the counting result and sequentially output the compensation values in a transmission operation. The transmission operation follows the reception operation. The adjusting circuit is coupled to the compensation circuit, and configured to receive the compensation values and sequentially adjust amplitude of a signal according to the compensation values in the transmission operation. The compensation values are respectively applied to different portions of the signal.
    Type: Application
    Filed: December 22, 2021
    Publication date: October 20, 2022
    Applicant: Realtek Semiconductor Corp.
    Inventors: Beng-Meng Chen, Chien-Jung Huang, Jhih-Yuan Ke
  • Patent number: 11418157
    Abstract: A gain control circuit utilized in a transmitter is disclosed. The transmitter is configured to amplify an input signal according to a gain via a digital amplifier, an analog amplifier and a power amplifier, to generate an output signal. The gain control circuit includes a correction unit configured to calculate a correction power according to an elapsed time since a current packet transmission duration of the transmitter is completed. The gain control circuit adjusts the gain according to the correction power, a transmitter signal strength indication of the input signal and an environment temperature of the transmitter.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: August 16, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Beng-Meng Chen, Chien-Jung Huang, Jhih-Yuan Ke
  • Publication number: 20220247368
    Abstract: A gain control circuit utilized in a transmitter is disclosed. The transmitter is configured to amplify an input signal according to a gain via a digital amplifier, an analog amplifier and a power amplifier, to generate an output signal. The gain control circuit includes a correction unit configured to calculate a correction power according to an elapsed time since a current packet transmission duration of the transmitter is completed. The gain control circuit adjusts the gain according to the correction power, a transmitter signal strength indication of the input signal and an environment temperature of the transmitter.
    Type: Application
    Filed: June 3, 2021
    Publication date: August 4, 2022
    Inventors: Beng-Meng CHEN, Chien-Jung HUANG, Jhih-Yuan KE
  • Patent number: 11406022
    Abstract: A method of fabricating a substrate having a through via includes: providing a carrier board having a release layer thereon; attaching the substrate onto the carrier board via the release layer; applying a light beam to the substrate to form a first blind hole in the substrate, wherein the first blind hole penetrates a first surface and a second surface of the substrate; performing an enlargement process on the first blind hole to form a second blind hole; forming a through via in the second blind hole; and performing a de-bonding process to release the substrate having a through via from the carrier board.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: August 2, 2022
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-I Wu, Shih-Ming Lin, Pin-Hao Hu, Yu-Chung Lin, Hsin-Yu Chang, Fu-Lung Chou, Chien-Jung Huang
  • Patent number: 11338392
    Abstract: A cutting method for forming a chamfered corner includes a step of selecting a light pattern-adjusting module according to a pre-cut chamfer angle, a step of the light pattern-adjusting module emitting a laser beam to a substrate and thus forming a modified region extending in a thickness direction at the substrate, a step of the light pattern-adjusting module adjusting an axial energy distribution of a light pattern of the laser beam to vary an appearance of the modified region so as to form the modified region fulfilling the pre-cut chamfer angle, and a step of etching the substrate having the modified region to form a chamfered surface on the substrate by cutting the modified region from the substrate.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: May 24, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsin-Yu Chang, Fu-Lung Chou, Chien-Jung Huang, Yu-Chung Lin, Min-Kai Lee
  • Publication number: 20220149798
    Abstract: A transmission circuit includes a power amplifier, a power amplifier forestage circuit and a signal strength adjusting circuit. The power amplifier is configured to amplify an input signal to output an output signal. The power amplifier forestage circuit is configured to output the input signal. The signal strength adjusting circuit includes a conversion circuit, a processing circuit and a storage unit. The conversion circuit is configured to convert the voltage of the output signal into an operation value. The processing circuit is configured to perform an operation according to a target index value stored by the storage unit and the operation value to obtain a differential value. The processing circuit is further configured to adjust the input signal outputted by the power amplifier forestage circuit according to the differential value, so that the power of the output signal is maintained at a target power value.
    Type: Application
    Filed: July 1, 2021
    Publication date: May 12, 2022
    Inventors: Beng-Meng CHEN, Chien-Jung Huang, Yi-Hua Lu
  • Publication number: 20220141961
    Abstract: A method of fabricating a substrate having a through via includes: providing a carrier board having a release layer thereon; attaching the substrate onto the carrier board via the release layer; applying a light beam to the substrate to form a first blind hole in the substrate, wherein the first blind hole penetrates a first surface and a second surface of the substrate; performing an enlargement process on the first blind hole to form a second blind hole; forming a through via in the second blind hole; and performing a de-bonding process to release the substrate having a through via from the carrier board.
    Type: Application
    Filed: December 24, 2020
    Publication date: May 5, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Chih-I Wu, Shih-Ming Lin, Pin-Hao Hu, Yu-Chung Lin, Hsin-Yu Chang, Fu-Lung Chou, Chien-Jung Huang