Patents by Inventor Chien-Kao Yang

Chien-Kao Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Structure and method for single gate non-volatile memory device having a capacitor well doping design with improved coupling efficiency
    Patent number: 8890225
    Abstract: The NVM device includes a semiconductor substrate having a first region and a second region. The NVM device includes a data-storing structure formed in the first region and designed operable to retain charges. The NVM device includes a capacitor formed in the second region and coupled with the data-storing structure for data operations. The data-storing structure includes a first doped well of a first-type in the semiconductor substrate. The data-storing structure includes a first gate dielectric feature on the first doped well. The data-storing structure includes a first gate electrode disposed on the first gate dielectric feature and configured to be floating. The capacitor includes a second doped well of the first-type. The capacitor includes a second gate dielectric feature on the second doped well. The capacitor also includes a second gate electrode disposed on the second gate dielectric feature and connected to the first gate electrode.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: November 18, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ta-Chuan Liao, Chien-Kao Yang, Ying-Kit Tsui, Shih-Hsien Chen, Liang-Tai Kuo, Chun-Yao Ko