Abstract: A semiconductor device includes a semiconductive substrate, a dielectric stack disposed over the semiconductive substrate, a probe pad formed on the dielectric stack, a test key embedded in the semiconductor device and a single via string stacking extending along a direction from a level of the probe pad to the semiconductive substrate and electrically connecting the periphery of the probe pad to the test key. A semiconductor device includes a semiconductive substrate, a dielectric stack, a probe pad, a test key, an extension segment electrically connected to the periphery of the probe pad and laterally extending from the probe pad from a top view, and a single via string stacking extending along a direction from the probe pad to the semiconductive substrate and electrically connecting the extension segment to the test key. The single via string stacking and the probe pad are laterally offset from a top view.

Abstract: A semiconductor device includes: a metal thin film disposed on a semiconductor substrate; and first and second contact structures disposed on the metal thin film, wherein the first and second contact structures are laterally spaced from each other by a dummy layer that comprises at least one polishing resistance material.

Abstract: A method includes: forming a first conductive structure in a first dielectric layer; forming a conductive protection structure that is coupled to at least part of the first conductive structure; forming a second dielectric layer over the first dielectric layer; forming a via hole extending through at least part of the second dielectric layer to expose a portion of the conductive protection structure; cleaning the via hole; and refilling the via hole with a conductive material to form a via structure.

Abstract: A semiconductor structure includes a shallow trench isolation (STI) structure. The semiconductor structure includes a substrate having a first surface. A STI structure extends from the first surface into the substrate. The STI structure includes a first portion and a second portion. The first portion extends from the first surface into the substrate, and has an intersection with the first surface. The second portion extends away from the first portion, and has a tip at a distance away from the intersection in a direction parallel to the first surface. The first portion and the second portion are filled with a dielectric material.

Abstract: In an embodiment, a method includes: growing a phase change material on a platform configured for a semiconductor workpiece process; setting the phase change material to an amorphous state; performing the semiconductor workpiece process within a semiconductor processing chamber; and measuring resistance across two points along the phase change material.

Abstract: A semiconductor device includes: a plurality of vertical conductive structures, wherein each of the plurality of vertical conductive structures extends through an isolation layer; and an insulated extension disposed horizontally between a first one and a second one of the plurality of vertical conductive structures.

Abstract: A semiconductor device includes: a plurality of vertical conductive structures, wherein each of the plurality of vertical conductive structures extends through an isolation layer; and an insulated extension disposed horizontally between a first one and a second one of the plurality of vertical conductive structures.

Abstract: A semiconductor device includes: a metal thin film disposed on a semiconductor substrate; and first and second contact structures disposed on the metal thin film, wherein the first and second contact structures are laterally spaced from each other by a dummy layer that comprises at least one polishing resistance material.

Abstract: A semiconductor device includes: a plurality of vertical conductive structures, wherein each of the plurality of vertical conductive structures extends through an isolation layer; and an insulated extension disposed horizontally between a first one and a second one of the plurality of vertical conductive structures.

Abstract: A method includes: forming a first conductive structure in a first dielectric layer; forming a conductive protection structure that is coupled to at least part of the first conductive structure; forming a second dielectric layer over the first dielectric layer; forming a via hole extending through at least part of the second dielectric layer to expose a portion of the conductive protection structure; cleaning the via hole; and refilling the via hole with a conductive material to form a via structure.

Abstract: A semiconductor device and a method for fabricating the same are disclosed. The semiconductor device comprises: a semiconductor substrate with an active area defined by a plurality of isolation features; a gate stack extending across the active area onto portions of the isolation features, wherein the gate stack comprising a gate dielectric layer on the active area and the portions of the isolation features, and a gate electrode on the gate dielectric layer; and a protective seal comprising a vertical portion lining sidewalls of the gate stack and a horizontal portion extending onto a top surface of the isolation features, wherein the horizontal portion surrounding portions of the gate stack outside the active area in a top view.

Abstract: A semiconductor structure and a method for forming the semiconductor structure are provided. In various embodiments, the method for forming a semiconductor structure includes following steps. A structure on a semiconductor substrate is received, which the structure includes at least two conductive lines and a shorting bridge, and the conductive lines electrically connected to each other through the shorting bridge. The shorting bridge is insulated to make the conductive lines electrically isolated to each other.

Abstract: A semiconductor structure and a method for forming the semiconductor structure are provided. In various embodiments, the method for forming a semiconductor structure includes following steps. A structure on a semiconductor substrate is received, which the structure includes at least two conductive lines and a shorting bridge, and the conductive lines electrically connected to each other through the shorting bridge. The shorting bridge is insulated to make the conductive lines electrically isolated to each other.

Abstract: A semiconductor device and a method for fabricating the same are disclosed. The semiconductor device comprises: a semiconductor substrate with an active area defined by a plurality of isolation features; a gate stack extending across the active area onto portions of the isolation features, wherein the gate stack comprising a gate dielectric layer on the active area and the portions of the isolation features, and a gate electrode on the gate dielectric layer; and a protective seal comprising a vertical portion lining sidewalls of the gate stack and a horizontal portion extending onto a top surface of the isolation features, wherein the horizontal portion surrounding portions of the gate stack outside the active area in a top view.

Abstract: A semiconductor structure and a method for forming the semiconductor structure are provided. In various embodiments, the method for forming a semiconductor structure includes following steps. A structure on a semiconductor substrate is received, which the structure includes at least two conductive lines and a shorting bridge, and the conductive lines electrically connected to each other through the shorting bridge. The shorting bridge is insulated to make the conductive lines electrically isolated to each other.

Abstract: A semiconductor device and a method for fabricating the same are disclosed. The semiconductor device comprises: a semiconductor substrate with an active area defined by a plurality of isolation features; a gate stack extending across the active area onto portions of the isolation features, wherein the gate stack comprising a gate dielectric layer on the active area and the portions of the isolation features, and a gate electrode on the gate dielectric layer; and a protective seal comprising a vertical portion lining sidewalls of the gate stack and a horizontal portion extending onto a top surface of the isolation features, wherein the horizontal portion surrounding portions of the gate stack outside the active area in a top view.

Abstract: A semiconductor structure and a method for forming the semiconductor structure are provided. In various embodiments, the method for forming a semiconductor structure includes following steps. A structure on a semiconductor substrate is received, which the structure includes at least two conductive lines and a shorting bridge, and the conductive lines electrically connected to each other through the shorting bridge. The shorting bridge is insulated to make the conductive lines electrically isolated to each other.

Abstract: A semiconductor device and a method for fabricating the same are disclosed. The semiconductor device comprises: a semiconductor substrate with an active area defined by a plurality of isolation features; a gate stack extending across the active area onto portions of the isolation features, wherein the gate stack comprising a gate dielectric layer on the active area and the portions of the isolation features, and a gate electrode on the gate dielectric layer; and a protective seal comprising a vertical portion lining sidewalls of the gate stack and a horizontal portion extending onto a top surface of the isolation features, wherein the horizontal portion surrounding portions of the gate stack outside the active area in a top view.

Abstract: One or more techniques or systems for controlling a profile for photo resist (PR) are provided herein. In some embodiments, a first shield layer is formed on a first PR layer and a second PR layer is formed on the first shield layer. A first window is formed within the second PR layer during a first exposure with a mask. A second window is formed within the first shield layer based on the first window. A third window is formed within the first PR layer during a second exposure without a mask. Because, the third window is formed while the first shield layer and the second PR layer are on the first PR layer, a profile associated with the first PR layer is controlled. Contamination during ion bombardment is mitigated due to the controlled profile.

Abstract: A semiconductor structure includes a shallow trench isolation (STI) structure. The semiconductor structure includes a substrate having a first surface. A STI structure extends from the first surface into the substrate. The STI structure includes a first portion and a second portion. The first portion extends from the first surface into the substrate, and has an intersection with the first surface. The second portion extends away from the first portion, and has a tip at a distance away from the intersection in a direction parallel to the first surface. The first portion and the second portion are filled with a dielectric material.