Abstract: A voltage clamping circuit is provided. In an embodiment, the voltage clamping circuit includes a plurality of gain shifting circuits and a signal processing circuit. The plurality of gain shifting circuits receive an input voltage and voltage levels to generate a plurality of shifted voltages. The signal processing circuit generates a difference value of the plurality of shifted voltages to generate an output voltage according to the difference value, such that the voltage clamping circuit achieves an implementation of a passing band or a rejection of the input voltage.

Abstract: An interconnecting structure for electrically connecting a first electronic device with a second electronic device is provided. The first electronic device has two first bond-pads, and the second electronic device has two second bond-pads electrically connected to the two first bond-pads respectively. The interconnecting structure includes a signal transmission structure electrically connected to the two first bond-pads and the two second bond-pads; and a ground device disposed between the first electronic device and the second electronic device so that the first electronic device and the second electronic device have a same ground potential.

Abstract: A broadband connection structure is disclosed. The broadband connection structure includes a carrier and a chip. The carrier includes a first resonator. The chip includes a second resonator and configured on the carrier using a flip-chip method. The first resonator is connected to the second resonator via a magnetic field and an electric field existing therebetween to transmit a broadband signal between the carrier and the chip. A broadband connection method is also disclosed.

Abstract: The present invention provides a frequency multiplier apparatus. The frequency multiplier apparatus includes an injection-locked frequency multiplier and a frequency-to-control signal converter. The injection-locked frequency multiplier outputs an output signal having a first frequency in response to an input signal having a first basic frequency. The frequency-to-control signal converter provides a first control signal to the injection-locked frequency multiplier in response to the input signal. The injection-locked frequency multiplier adjusts the first frequency to a second frequency in response to a change of the first control signal when the first basic frequency is changed to a second basic frequency.

Abstract: A broadband connection structure is disclosed. The broadband connection structure includes a carrier and a chip. The carrier includes a first resonator. The chip includes a second resonator and configured on the carrier using a flip-chip method. The first resonator is connected to the second resonator via a magnetic field and an electric field existing therebetween to transmit a broadband signal between the carrier and the chip. A broadband connection method is also disclosed.

Abstract: An interconnecting structure for electrically connecting a first electronic device with a second electronic device is provided. The first electronic device has two first bond-pads, and the second electronic device has two second bond-pads electrically connected to the two first bond-pads respectively. The interconnecting structure includes a signal transmission structure electrically connected to the two first bond-pads and the two second bond-pads; and a ground device disposed between the first electronic device and the second electronic device so that the first electronic device and the second electronic device have a same ground potential.

Abstract: The present invention provides a frequency multiplier apparatus. The frequency multiplier apparatus includes an injection-locked frequency multiplier and a frequency-to-control signal converter. The injection-locked frequency multiplier outputs an output signal having a first frequency in response to an input signal having a first basic frequency. The frequency-to-control signal converter provides a first control signal to the injection-locked frequency multiplier in response to the input signal. The injection-locked frequency multiplier adjusts the first frequency to a second frequency in response to a change of the first control signal when the first basic frequency is changed to a second basic frequency.

Abstract: The present invention provides a method for identifying a specific number of communicating points having relatively smallest accumulated path values from a plurality of transmitting points for a receiving point in a communication system. The method includes steps of: (a) defining a first coordination of each of the plurality of transmitting points and the receiving point on a complex plane; (b) transferring the first coordination of the receiving point to a second coordination thereof, in which the second coordination of the receiving point is near an origin of the complex plane; and (c) identifying the specific number of transmitting points having relatively smallest accumulated path values based on the second coordination of the receiving point.

Abstract: A front-end circuit with coherent tunable filters is provided. The circuit includes a first filter, an amplifier, and a second filter. The amplifier is coupled to the first filter, and the second filter is coupled to the amplifier. Furthermore, the amplifier is placed between the first and second filters. The first filter has a first tunable intermediate frequency, and is used to filter a received signal. The amplifier is used to amplify the output of the first filter. The second filter has a second tunable intermediate frequency, and is used to filter the output of the amplifier. The first and second intermediate frequencies have a coherent-tuning relation with each other.

Abstract: A low noise amplifier including an amplifier kernel circuit and a DC bias unit is provided. The amplifier kernel circuit is used for receiving a single input signal or a differential input signal so as to output a differential output signal. The DC bias unit is coupled to the amplifier kernel circuit, and is used for processing a signal source to generate the single input signal or the differential input signal according to its circuit configuration.

Abstract: The present invention provides a method for identifying a specific number of communicating points having relatively smallest accumulated path values from a plurality of transmitting points for a receiving point in a communication system. The method includes steps of: (a) defining a first coordination of each of the plurality of transmitting points and the receiving point on a complex plane; (b) transferring the first coordination of the receiving point to a second coordination thereof, in which the second coordination of the receiving point is near an origin of the complex plane; and (c) identifying the specific number of transmitting points having relatively smallest accumulated path values based on the second coordination of the receiving point.

Abstract: A low noise amplifier including an amplifier kernel circuit and a DC bias unit is provided. The amplifier kernel circuit is used for receiving a single input signal or a differential input signal so as to output a differential output signal. The DC bias unit is coupled to the amplifier kernel circuit, and is used for processing a signal source to generate the single input signal or the differential input signal according to its circuit configuration.

Abstract: A circuit and a method for implementing frequency tripled I/Q signals are proposed, including receiving two input I/Q signals through frequency multipliers so as to generate two frequency multiplied signals and mixing the input I/Q signals and the corresponding frequency multiplied signals through mixers for generating and outputting two I/Q signals with a frequency three times that of the input I/Q signals. The invention eliminates the requirement for high amplitude of the input signals as in the prior art and has lower power consumption and broader bandwidth and can be used as high frequency signal sources in any single chip processes.

Abstract: A circuit and a method for implementing frequency tripled I/Q signals are proposed, including receiving two input I/Q signals through frequency multipliers so as to generate two frequency multiplied signals and mixing the input I/Q signals and the corresponding frequency multiplied signals through mixers for generating and outputting two I/Q signals with a frequency three times that of the input I/Q signals. The invention eliminates the requirement for high amplitude of the input signals as in the prior art and has lower power consumption and broader bandwidth and can be used as high frequency signal sources in any single chip processes.

Abstract: A front-end circuit with coherent tunable filters is provided. The circuit includes a first filter, an amplifier, and a second filter. The amplifier is coupled to the first filter, and the second filter is coupled to the amplifier. Furthermore, the amplifier is placed between the first and second filters. The first filter has a first tunable intermediate frequency, and is used to filter a received signal. The amplifier is used to amplify the output of the first filter. The second filter has a second tunable intermediate frequency, and is used to filter the output of the amplifier. The first and second intermediate frequencies have a coherent-tuning relation with each other.

Abstract: A miniature inductor suitable for integrated circuits comprises a semiconductor substrate having a coplanar strip line and a plurality of metal-insulator-metal (MIM) capacitors, wherein the plurality of MIM capacitors are connected between the transmission lines of the coplanar strip line in parallel, and the coplanar strip line connected with the MIM capacitors further comprises a crossed planar strip line structure or a shifted planar strip line structure. The present invention reduces the occupied area for an inductor by adding the MIM capacitors and folding the transmission lines, and alleviates the quality factor degradation of the inductor caused by substrate loss.

Abstract: A method of fabricating photodiode includes: a substrate comprising a well is provided, next, a first doping region is formed in the well, following that a conductive layer is formed on the surface of the first doping region by an epitaxial growth process, meanwhile, the conductive layer is in-situ doped to form a second doping region in the conductive layer. The method for fabricating the photodiode in the present invention can prevent the lattice structure from being damaged during the high dozes implantation process. Therefore, the dark current can be reduced and the sensitivity of the photodiode will be increased.

Abstract: This invention relates to a low noise amplifier, used in radio frequency integrated circuit design, especially low noise amplifiers for ultra broad-band wireless communication, comprising at least a transistor of the core circuit of a low noise amplifier structure, a transformer that is implemented on the chip, in order to form a dual feedback amplifier, that is, an amplifier structure comprising an inductive feedback and a capacitive feedback, wherein the capacitive feedback is used for the low and medium frequency range, while the inductive feedback is used for the high frequency range. By assembling an amplifier circuit with these two feedback paths, it is possible to provide a broadband and good impedance matching at the signal input end of the circuit.

Abstract: This invention relates to a low noise amplifier, used in radio frequency integrated circuit design, especially low noise amplifiers for ultra broad-band wireless communication, comprising at least a transistor of the core circuit of a low noise amplifier structure, a transformer that is implemented on the chip, in order to form a dual feedback amplifier, that is, an amplifier structure comprising an inductive feedback and a capacitive feedback, wherein the capacitive feedback is used for the low and medium frequency range, while the inductive feedback is used for the high frequency range. By assembling an amplifier circuit with these two feedback paths, it is possible to provide a broadband and good impedance matching at the signal input end of the circuit.

Abstract: A miniature inductor suitable for integrated circuits comprises a semiconductor substrate having a coplanar strip line and a plurality of metal-insulator-metal (MIM) capacitors, wherein the plurality of MIM capacitors are connected between the transmission lines of the coplanar strip line in parallel, and the coplanar strip line connected with the MIM capacitors further comprises a crossed planar strip line structure or a shifted planar strip line structure. The present invention reduces the occupied area for an inductor by adding the MIM capacitors and folding the transmission lines, and alleviates the quality factor degradation of the inductor caused by substrate loss.