Patents by Inventor Chien-Neng Liao
Chien-Neng Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220243992Abstract: A heat transfer element, a method for manufacturing the same and a semiconductor structure including the same are provided. The heat transfer element includes a housing, a chamber, a dendritic layer and a working fluid. The chamber is defined by the housing. The dendritic layer is disposed on an inner surface of the housing. The working fluid is located within the chamber.Type: ApplicationFiled: January 29, 2021Publication date: August 4, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hung-Hsien HUANG, Shin-Luh TARNG, Ian HU, Chien-Neng LIAO, Jui-Cheng YU, Po-Cheng HUANG
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Patent number: 10612854Abstract: A sample holder for annealing apparatus and electrically assisted annealing apparatus using the same are provided. The sample holder includes a heat conductive shell, high thermal conductive and electrical insulation blocks, first and second electrodes. The heat conductive shell includes a base frame and a top cover. The high thermal conductive and electrical insulation blocks are adjacent to the base frame and the top cover, respectively, and a sample pallet is sandwiched therebetween. Length and width of the sample pallet is smaller than that of the high thermal conductive and electrical insulation blocks. The first and the second electrodes are fixed to two sides of the sample pallet, and are connected to electrifying wire respectively. Thickness of the first and the second electrodes is smaller than that of the sample pallet, while the width of the first and the second electrodes is longer than that of the sample pallet.Type: GrantFiled: November 19, 2014Date of Patent: April 7, 2020Assignee: Industrial Technology Research InstituteInventors: Hsu-Shen Chu, Chien-Neng Liao, Yao-Hsiang Chen
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Patent number: 10475742Abstract: A method of forming a semiconductor device structure includes: forming a first conductive structure over a substrate, the first conductive structure including twin boundaries; and wherein the forming the first conductive structure includes manipulating process conditions so as to promote formation of the twin boundaries resulting in a promoted density of twin boundaries such that the first conductive structure has an increased failure current density (FCD) relative to a baseline FCD of an otherwise substantially corresponding second conductive structure which has an unpromoted density of twin boundaries, the unpromoted density being less than the promoted density and such that the first conductive structure has a resistance which is substantially the same as the second conductive structure.Type: GrantFiled: November 30, 2018Date of Patent: November 12, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jian-Hong Lin, Chwei-Ching Chiu, Yung-Huei Lee, Chien-Neng Liao, Yu-Lun Chueh, Tsung-Cheng Chan, Chun-Lung Huang
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Patent number: 10283450Abstract: A method, for forming a semiconductor device structure, includes: forming a conductive structure over a substrate, wherein the conductive structure includes twin boundaries. The forming the conductive structure includes: manipulating process conditions so as to promote formation of the twin boundaries and yet control a density of the twin boundaries to be outside a range for which a portion of a curve is an asymptote of a constant value, the curve representing values of an atomic migration ratio corresponding to values of the density of the twin boundaries.Type: GrantFiled: August 9, 2017Date of Patent: May 7, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jian-Hong Lin, Chwei-Ching Chiu, Yung-Huei Lee, Chien-Neng Liao, Yu-Lun Chueh, Tsung-Cheng Chan, Chun-Lung Huang
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Publication number: 20190103351Abstract: A method of forming a semiconductor device structure includes: forming a first conductive structure over a substrate, the first conductive structure including twin boundaries; and wherein the forming the first conductive structure includes manipulating process conditions so as to promote formation of the twin boundaries resulting in a promoted density of twin boundaries such that the first conductive structure has an increased failure current density (FCD) relative to a baseline FCD of an otherwise substantially corresponding second conductive structure which has an unpromoted density of twin boundaries, the unpromoted density being less than the promoted density and such that the first conductive structure has a resistance which is substantially the same as the second conductive structure.Type: ApplicationFiled: November 30, 2018Publication date: April 4, 2019Inventors: Jian-Hong LIN, Chwei-Ching CHIU, Yung-Huei LEE, Chien-Neng LIAO, Yu-Lun CHUEH, Tsung-Cheng CHAN, Chun-Lung HUANG
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Publication number: 20170338178Abstract: A method, for forming a semiconductor device structure, includes: forming a conductive structure over a substrate, wherein the conductive structure includes twin boundaries. The forming the conductive structure includes: manipulating process conditions so as to promote formation of the twin boundaries and yet control a density of the twin boundaries to be outside a range for which a portion of a curve is an asymptote of a constant value, the curve representing values of an atomic migration ratio corresponding to values of the density of the twin boundaries.Type: ApplicationFiled: August 9, 2017Publication date: November 23, 2017Inventors: Jian-Hong LIN, Chwei-Ching CHIU, Yung-Huei LEE, Chien-Neng LIAO, Yu-Lun CHUEH, Tsung-Cheng CHAN, Chun-Lung HUANG
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Patent number: 9761523Abstract: A semiconductor device structure with twin-boundaries and method for forming the same are provided. The semiconductor device structure includes a substrate and a conductive structure formed over the substrate. The conductive structure includes twin boundaries, and a density of the twin boundaries is in a range from about 25 ?m?1 to about 250 ?m?1.Type: GrantFiled: August 21, 2015Date of Patent: September 12, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jian-Hong Lin, Chwei-Ching Chiu, Yung-Huei Lee, Chien-Neng Liao, Yu-Lun Chueh, Tsung-Cheng Chan, Chun-Lung Huang
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Publication number: 20170170378Abstract: A thermoelectric module including at least one PN junction device is provided. The PN junction device includes a PN junction structure, top electrodes and at least one bottom electrode. The PN junction structure includes an N-type thermoelectric element and a P-type thermoelectric element, wherein side surfaces of the N-type thermoelectric element and the P-type thermoelectric element facing each other are in contact. The top electrodes are separated from each other and respectively cover a portion of a top surface of the N-type thermoelectric element or a portion of a top surface of the P-type thermoelectric element. The bottom electrode covers a bottom surface of the N-type thermoelectric element and a bottom surface of the P-type thermoelectric element.Type: ApplicationFiled: March 10, 2016Publication date: June 15, 2017Inventors: Chien-Neng Liao, Meng-Pei Lu, Ming-Chi Tai, Li-Chi Chen, Hung-Hsien Huang
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Publication number: 20170053865Abstract: A semiconductor device structure with twin-boundaries and method for forming the same are provided. The semiconductor device structure includes a substrate and a conductive structure formed over the substrate. The conductive structure includes twin boundaries, and a density of the twin boundaries is in a range from about 25 ?m?1 to about 250 ?m?1.Type: ApplicationFiled: August 21, 2015Publication date: February 23, 2017Applicant: Taiwan Semiconductor Manufacturing Co., LtdInventors: Jian-Hong LIN, Chwei-Ching CHIU, Yung-Huei LEE, Chien-Neng LIAO, Yu-Lun CHUEH, Tsung-Cheng CHAN, Chun-Lung HUANG
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Publication number: 20150176904Abstract: A sample holder for annealing apparatus and electrically assisted annealing apparatus using the same are provided. The sample holder includes a heat conductive shell, high thermal conductive and electrical insulation blocks, first and second electrodes. The heat conductive shell includes a base frame and a top cover. The high thermal conductive and electrical insulation blocks are adjacent to the base frame and the top cover, respectively, and a sample pallet is sandwiched therebetween. Length and width of the sample pallet is smaller than that of the high thermal conductive and electrical insulation blocks. The first and the second electrodes are fixed to two sides of the sample pallet, and are connected to electrifying wire respectively. Thickness of the first and the second electrodes is smaller than that of the sample pallet, while the width of the first and the second electrodes is longer than that of the sample pallet.Type: ApplicationFiled: November 19, 2014Publication date: June 25, 2015Inventors: Hsu-Shen Chu, Chien-Neng Liao, Yao-Hsiang Chen
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Publication number: 20130270121Abstract: The present invention discloses a method for fabricating a copper nanowire with high density twins, which comprises steps: providing a template having a top surface, a bottom surface and a plurality of through-holes penetrating the top surface and the bottom surface and having a diameter of smaller than 55 nm; placing the template in a copper-containing electrolyte at a low temperature lower than ambient temperature and applying a pulse current to perform an electrodeposition process to form a copper nanowire with twin structures in each through-hole. The pulse current increases the probability of stacking faults in the deposited copper ions. The low temperature operation favors formation of nucleation sites of twins. Therefore, the copper nanowire has higher density of twins. Thereby is effectively inhibited electromigration of the copper nanowire.Type: ApplicationFiled: February 27, 2013Publication date: October 17, 2013Applicant: NATIONAL TSING HUA UNIVERSITYInventors: Chien-Neng LIAO, Yu-Lun CHUEH, Tsung-Cheng CHAN, Yen-Miao LIN
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Publication number: 20130112909Abstract: A highly efficient thermoelectric material with one end coated in silver adhesive and placed in a high temperature furnace to heat and diffuse the silver adhesive into the homogeneous thermoelectric material, thereby producing an non-uniform thermoelectric material one-side doped thermoelectric material. The non-uniform thermoelectric material one-side doped thermoelectric material is able to achieve a high thermoelectric figure of merit.Type: ApplicationFiled: June 27, 2012Publication date: May 9, 2013Inventors: Chien-Neng Liao, Hung-Hsien Huang, Li-Chieh Wu, Sin-Shien Lin, Meng-Pei Lu, Chien-Hao Chiu
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Patent number: 8420185Abstract: A method for forming a metal film with twins is disclosed. The method includes: (a) forming a metal film over a substrate, the metal film being made of a material having one of a face-centered cubic crystal structure and a hexagonal close-packed crystal structure; and (b) ion bombarding the metal film at a film temperature lower than ?20° C. in a vacuum chamber and with an ion-bombarding energy sufficient to cause plastic deformation of the metal film to generate deformation twins in the metal film.Type: GrantFiled: July 17, 2012Date of Patent: April 16, 2013Assignee: National Tsing Hua UniversityInventors: Yu-Lun Chueh, Tsung-Cheng Chan, Chien-Neng Liao
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Publication number: 20130089674Abstract: A method for forming a metal film with twins is disclosed. The method includes: (a) forming a metal film over a substrate, the metal film being made of a material having one of a face-centered cubic crystal structure and a hexagonal close-packed crystal structure; and (b) ion bombarding the metal film at a film temperature lower than ?20° C. in a vacuum chamber and with an ion-bombarding energy sufficient to cause plastic deformation of the metal film to generate deformation twins in the metal film.Type: ApplicationFiled: July 17, 2012Publication date: April 11, 2013Inventors: Yu-Lun CHUEH, Tsung-Cheng CHAN, Chien-Neng LIAO
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Publication number: 20120103382Abstract: A thermoelectric generation apparatus connected with a heat generation element includes a spreader and at least one thermoelectric generator. The spreader has two opposite surfaces with one surface attached to the thermoelectric generator and another surface attached to the heat generation element. The thermoelectric generator converts thermal energy into electric energy to be output. Through the spreader, thermal energy of the heat generation element can be conducted to be evenly distributed on the surface of the spreader to improve undesirable heat generation efficiency of the thermoelectric generator caused by uneven temperature distributed on the surface of the heat generation element.Type: ApplicationFiled: April 25, 2011Publication date: May 3, 2012Inventors: Cheng-Ting HSU, Da-Jang Yao, Chien-Neng Liao