Patents by Inventor Chien Pang Lin

Chien Pang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180196533
    Abstract: A tip and stylus for a capacitive sensor are provided. The stylus includes a stylus body, an amplifier circuit, and a tip. The tip includes a first electrode, an insulating element, a second electrode, and a shield. The first electrode has a thread element at a distal end of the first electrode. The second electrode is aligned with a longitudinal axis of the stylus, the longitudinal axis being parallel with a central axis of the stylus. The shield is disposed between the first electrode and the second electrode. The first electrode and the second electrode are electrically insulated from the shield by a cap layer, in which the first electrode, the second electrode, and the shield selectively move in response to the tip of the stylus contacting a touch screen having the capacitive sensor in accordance to an angle of contact and a contact force.
    Type: Application
    Filed: August 1, 2016
    Publication date: July 12, 2018
    Inventors: Zachary Joseph ZELIFF, Hong Bin KOH, Chien-Pang LIN, Reinier BLOEM
  • Patent number: 9977520
    Abstract: Embodiments of a stylus having a capacitive slide sensor and grip sensors are disclosed, for use with electronic devices and particularly with touchscreen devices. The stylus is in signal communication with the electronic device, either wired or wirelessly, and the slide sensor allows a user to generate a sliding data value as well as a contact/no-contact datum; these can be used as scaled control values or as buttonpress control values to control features of applications running on the electronic device. The capacitive sensors are formed on a single flexible PCB wrapped inside the stylus barrel.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: May 22, 2018
    Assignee: Adonit Co., Ltd.
    Inventors: Yu-Kuang Hou, Yueh-Hua Li, Yen-Teh Lee, Chien-Pang Lin, Yu-Ting Lo
  • Patent number: 9891724
    Abstract: Embodiments of a circuit and a stylus for interacting with a capacitive sensor are disclosed. The stylus includes a stylus body, a circuit disposed within the stylus body, a tip, and a power source. The circuit includes an input terminal, an amplifier, and an output terminal. The tip includes a sensing electrode and an emitting electrode, and the tip is disposed on a proximal end of the stylus body. The power source is electrically coupled to the circuit. The input terminal of the circuit is electrically coupled to the sensing electrode of the tip, and the output terminal of the circuit is electrically coupled to the emitting electrode of the tip. The circuit receives a signal through the sensing electrode, amplifies and inverts the signal, and outputs the signal through the emitting electrode. The amplifier of the circuit amplifies only a portion of the signal that exceeds a threshold voltage.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: February 13, 2018
    Assignee: Adonit Co., Ltd.
    Inventors: Ting-Kuo Kao, Hsin Hsueh Wu, Chien-Pang Lin
  • Publication number: 20180024650
    Abstract: Embodiments of a stylus having a capacitive slide sensor and grip sensors are disclosed, for use with electronic devices and particularly with touchscreen devices. The stylus is in signal communication with the electronic device, either wired or wirelessly, and the slide sensor allows a user to generate a sliding data value as well as a contact/no-contact datum; these can be used as scaled control values or as buttonpress control values to control features of applications running on the electronic device. The capacitive sensors are formed on a single flexible PCB wrapped inside the stylus barrel.
    Type: Application
    Filed: July 22, 2016
    Publication date: January 25, 2018
    Inventors: Yu-Kuang Hou, Yueh-Hua Li, Yen-Teh Lee, CHIEN-PANG LIN, Yu-Ting Lo
  • Publication number: 20170322645
    Abstract: Embodiments of a circuit and a stylus for interacting with a capacitive sensor are disclosed. The stylus includes a stylus body, a circuit disposed within the stylus body, a tip, and a power source. The circuit includes an input terminal, an amplifier, and an output terminal. The tip includes a sensing electrode and an emitting electrode, and the tip is disposed on a proximal end of the stylus body. The power source is electrically coupled to the circuit. The input terminal of the circuit is electrically coupled to the sensing electrode of the tip, and the output terminal of the circuit is electrically coupled to the emitting electrode of the tip. The circuit receives a signal through the sensing electrode, amplifies and inverts the signal, and outputs the signal through the emitting electrode. The amplifier of the circuit amplifies only a portion of the signal that exceeds a threshold voltage.
    Type: Application
    Filed: May 4, 2016
    Publication date: November 9, 2017
    Inventors: Ting-Kuo Kao, Hsin Hsueh Wu, Chien-Pang Lin
  • Patent number: 9359684
    Abstract: A method of fabricating a self-aligned metal layer structure is disclosed. The method includes: providing a substrate including a conductive layer; forming a pattern in the conductive layer; and electroplating the conductive layer to form thereon an electroplated metal layer such that the pattern is directly transferred in the electroplated metal layer in a self-aligned manner. Methods of fabricating optics are also disclosed. The methods are capable of high accuracy in alignment, and the optics can be used in the production of a lens module.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: June 7, 2016
    Assignee: OMNIVISION OPTOELECTRONICS TECHNOLOGIES (SHANGHAI) CO., LTD.
    Inventors: Chia-Ming Chung, Chien-Pang Lin
  • Publication number: 20150337449
    Abstract: A method of fabricating a self-aligned metal layer structure is disclosed. The method includes: providing a substrate including a conductive layer; forming a pattern in the conductive layer; and electroplating the conductive layer to form thereon an electroplated metal layer such that the pattern is directly transferred in the electroplated metal layer in a self-aligned manner. Methods of fabricating optics are also disclosed. The methods are capable of high accuracy in alignment, and the optics can be used in the production of a lens module.
    Type: Application
    Filed: July 31, 2014
    Publication date: November 26, 2015
    Inventors: Chia-Ming Chung, Chien-Pang Lin
  • Publication number: 20140124519
    Abstract: This invention provides a heat insulating cup sleeve formed by folding a blank and including a first heat insulating sheet having a first holding portion, a first extending portion, and a first fold line and a second heat insulating sheet having a second holding portion, a second extending portion, and a second fold line. The second fold line is connected with the first holding portion, and the first fold line is connected with the second holding portion. The first holding portion and the second holding portion are capable of being folded downward along the second fold line and the first fold line, respectively, to form an opening. When a cup is inserted into the opening, the first holding portion and the second holding portion press against an outer surface of the cup.
    Type: Application
    Filed: November 1, 2013
    Publication date: May 8, 2014
    Inventor: CHIEN PANG LIN
  • Publication number: 20110235950
    Abstract: A foldable bag, made of a flexible sheet or board like material having a plurality of fold lines, includes a bottom wall, two side walls respectively connected to two opposite sides of the bottom wall, and two connecting walls respectively connected with the side walls and the bottom wall to define a containing space therein. The side wall has a first fold line parallel to the bottom wall and is capable of being folded towards the center of the foldable bag. The connecting wall has two second fold lines respectively extended along the diagonal lines and intersected with each other, and a third fold line parallel to the bottom wall and extended through the intersection point of the two second lines, wherein the ends of the third fold line are connected to the respective ends of the first fold lines, wherein the second fold lines and the third fold lines are capable of being folded toward the center of the foldable bag.
    Type: Application
    Filed: March 28, 2011
    Publication date: September 29, 2011
    Inventor: CHIEN-PANG LIN
  • Patent number: 8000041
    Abstract: According to an embodiment of the present invention, a lens module is provided, which includes a first lens assembly including a first patterned substrate, a first recess formed from a first surface of the first patterned substrate, a first lens element disposed in the first recess, and a second lens element disposed on the first patterned substrate, wherein the second lens element aligns along an optical axis through the first lens element.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: August 16, 2011
    Assignees: VisEra Technologies Company Limited, OmniVision Technologies, Inc.
    Inventors: Chien-Pang Lin, San-Yuan Chung, Weng-Chu Chu
  • Patent number: 7860357
    Abstract: An optoelectronic device chip, and a method for making the chip, are disclosed. The chip comprises a device substrate, an optically transparent upper substrate, and a composite spacer layer which includes an adhesive material and a plurality of particles dispersed in said adhesive material. The distance between the device substrate and the upper substrate is controlled by the thickness of the composite spacer layer so that the variation is within the depth of focus of optical system.
    Type: Grant
    Filed: August 9, 2008
    Date of Patent: December 28, 2010
    Assignee: VisEra Technologies Company, Ltd.
    Inventors: Hsiao-Wen Lee, Peter Zung, Tzu-Han Lin, Tzy-Ying Lin, Chia-Yang Chang, Chien-Pang Lin
  • Patent number: 7826148
    Abstract: Aspheric lens structures with dual aspheric surfaces and fabrication methods thereof are disclosed. An aspheric lens structure includes a first lens component with an aspheric top surface disposed on a second lens component, wherein the interface between the first lens component and the second lens component is spherical. The second lens component includes an aspheric back surface, wherein the radius of curvature of the aspheric top surface of the first lens component is different than the radius of curvature of the aspheric back surface of the second lens component. The second lens component may also include a planar back surface with a third lens component disposed on the planar back surface of the second component. The third lens component includes an aspheric back surface, wherein the radius of curvature of the aspheric top surface of the first lens component is different than the radius of curvature of the aspheric back surface of the third lens component.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: November 2, 2010
    Assignee: VisEra Technologies Company Limited
    Inventors: Pai-Chun Peter Zung, Shin-Chang Shiung, Wei-Ko Wang, Chia-Yang Chang, Chien-Pang Lin
  • Patent number: 7703997
    Abstract: An image sensor module comprises an image sensor chip, at least one lens layer, and at least one bonding layer. The image sensor chip has an image capturing zone manufactured with an image capturing element, and a partition zone surrounding the image capturing zone. The at least one lens layer is stacked on the image sensor chip, having a transparent substrate and a lens mounted on the transparent substrate and adapted to focus the projected image onto the image capturing zone of the image sensor chip. The at least one bonding layer is arranged corresponding to the partition zone of the image sensor chip and bonded between the image sensor chip and the at least one lens layer, mixing of a glue agent and a plurality of spacer elements with which the height of each the spacer elements is determined to be the height of the bonding layer.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: April 27, 2010
    Assignee: Visera Technologies, Co., Ltd.
    Inventors: Hsiao-Wen Lee, Tzu-Han Lin, Pai-Chun Peter Zung, Chien-Pang Lin
  • Patent number: 7576551
    Abstract: A test board for wafer level semiconductor testing is disclosed. The test board comprises a plurality of wires and microelectronic devices; and a plurality of test sockets on an upper surface of the test board. Each test socket comprises: a base member configured for attachment to the test board with a first set of screws, wherein the base member has a central opening exposing a portion of the underlying test board; an anisotropic conductive film disposed within the central opening of the base member; a chip to be tested, disposed on the anisotropic conductive film within the central opening of the base member; and a cover member overlying the chip, attached to the base member with a second set of screws.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: August 18, 2009
    Assignee: VisEra Technologies Company Limited
    Inventors: Sheng-Feng Lu, Shih-Ming Chen, Chien-Pang Lin, Ming-Hsun Sung
  • Publication number: 20090189055
    Abstract: Embodiments disclose an image sensor device, comprising a substrate comprising a plurality of photosensor cells located therein or thereon, a plurality of optical guide structures corresponding to the photosensor cells respectively, and a stacked layer surrounding the optical guide structures, comprising a plurality of top portions with sharp corners adjacent to the top edges of the optical guide structures.
    Type: Application
    Filed: January 25, 2008
    Publication date: July 30, 2009
    Inventors: Chien-Pang Lin, Chung-Jung Hsu, Shiu-Fang Yen, Wu-Chieh Liu
  • Publication number: 20090101947
    Abstract: An image sensor device is disclosed. The image sensor device comprises a substrate having a pixel array therein. A first transparent layer with a curved surface is disposed on the substrate. A micro lens array is conformally disposed on the curved surface of the first transparent layer and corresponds to the pixel array in the substrate. The invention also discloses an electronic assembly for an image sensor device and a fabrication method thereof.
    Type: Application
    Filed: October 17, 2007
    Publication date: April 23, 2009
    Inventors: Chien-Pang Lin, Chin-Poh Pang, Wu-Chieh Liu, Shiu-Fang Yen
  • Publication number: 20090079461
    Abstract: A test board for wafer level semiconductor testing is disclosed. The test board comprises a plurality of wires and microelectronic devices; and a plurality of test sockets on an upper surface of the test board. Each test socket comprises: a base member configured for attachment to the test board with a first set of screws, wherein the base member has a central opening exposing a portion of the underlying test board; an anisotropic conductive film disposed within the central opening of the base member; a chip to be tested, disposed on the anisotropic conductive film within the central opening of the base member; and a cover member overlying the chip, attached to the base member with a second set of screws.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 26, 2009
    Inventors: Sheng-Feng Lu, Shih-Ming Chen, Chien-Pang Lin, Ming-Hsun Sung
  • Publication number: 20080303109
    Abstract: An optoelectronic device chip, and a method for making the chip, are disclosed. The chip comprises a device substrate, an optically transparent upper substrate, and a composite spacer layer which includes an adhesive material and a plurality of particles dispersed in said adhesive material. The distance between the device substrate and the upper substrate is controlled by the thickness of the composite spacer layer so that the variation is within the depth of focus of optical system.
    Type: Application
    Filed: August 9, 2008
    Publication date: December 11, 2008
    Inventors: Hsiao-Wen Lee, Peter Zung, Tzu-Han Lin, Tzy-Ying Lin, Chia-Yang Chang, Chien-Pang Lin
  • Patent number: 7433555
    Abstract: An optoelectronic device chip, and a method for making the chip, are disclosed. The chip comprises a device substrate, an optically transparent upper substrate, and a composite spacer layer which includes an adhesive material and a plurality of particles dispersed in said adhesive material. The distance between the device substrate and the upper substrate is controlled by the thickness of the composite spacer layer so that the variation is within the depth of focus of optical system.
    Type: Grant
    Filed: May 22, 2006
    Date of Patent: October 7, 2008
    Assignee: Visera Technologies Company Ltd
    Inventors: Hsiao-Wen Lee, Peter Zung, Tzu-Han Lin, Tzy-Ying Lin, Chia-Yang Chang, Chien-Pang Lin
  • Publication number: 20080198481
    Abstract: Aspheric lens structures with dual aspheric surfaces and fabrication methods thereof are disclosed. An aspheric lens structure includes a first lens component with an aspheric top surface disposed on a second lens component, wherein the interface between the first lens component and the second lens component is spherical. The second lens component includes an aspheric back surface, wherein the radius of curvature of the aspheric top surface of the first lens component is different than the radius of curvature of the aspheric back surface of the second lens component. The second lens component may also include a planar back surface with a third lens component disposed on the planar back surface of the second component. The third lens component includes an aspheric back surface, wherein the radius of curvature of the aspheric top surface of the first lens component is different than the radius of curvature of the aspheric back surface of the third lens component.
    Type: Application
    Filed: February 15, 2007
    Publication date: August 21, 2008
    Inventors: Pai-Chun Peter Zung, Shin-Chang Shiung, Wei-Ko Wang, Chia-Yang Chang, Chien-Pang Lin